From 9bf58cefd19caa7f34282bbd068818b8e55592b3 Mon Sep 17 00:00:00 2001
From: Aric M <5118895+asmblur@users.noreply.github.com>
Date: Thu, 23 Jul 2020 17:11:41 -0500
Subject: [PATCH] Update expansionportpio.md

---
 expansionportpio.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/expansionportpio.md b/expansionportpio.md
index 59820cd..bc90bd8 100644
--- a/expansionportpio.md
+++ b/expansionportpio.md
@@ -4,7 +4,7 @@ bytes would contain the expansion ROM header.<br/>
 
 For region 1, the CPU outputs a chip select signal (CPU Pin 98, /EXP).<br/>
 For region 2, the CPU doesn't produce a chip select signal (the region is
-intended to contain multiple I/O ports, which do require an address decoder
+intended to contain multiple I/O ports, which require an address decoder
 anyways, that address decoder could treat any /RD or /WR with A13=Hi and A23=Hi
 and A22=Lo as access to expansion region 2 (for /WR, A22 may be ignored;
 assuming that the BIOS is read-only).<br/>