2019-05-29 16:57:22 +02:00
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// The OS/K Team licenses this file to you under the MIT license.
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// See the LICENSE file in the project root for more information.
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enum
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{
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INV,
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RIP,
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FLG,
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RBP,
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RSP,
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RAX,
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RBX,
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RCX,
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RDX,
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RSX,
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RBI,
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RDI,
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RSI,
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NX0,
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NX1,
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NX2,
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NX3,
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NX4,
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NX5,
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NX6,
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NX7,
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2019-05-30 12:44:56 +02:00
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2019-05-29 16:57:22 +02:00
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AX0,
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AX1,
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AX2,
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AX3,
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AX4,
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AX5,
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AX6,
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AX7,
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2019-05-30 12:44:56 +02:00
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2019-05-29 16:57:22 +02:00
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CR0,
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CR1,
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CR2,
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CR3,
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CR4,
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CR5,
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CR6,
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CR7,
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2019-05-30 12:44:56 +02:00
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2019-05-29 16:57:22 +02:00
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SA0,
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SA1,
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SA2,
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SA3,
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SA4,
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SA5,
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SA6,
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SA7,
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NREGS
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};
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2019-05-30 12:44:56 +02:00
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enum
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2019-05-29 16:57:22 +02:00
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{
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GPR = 1 << 0, // General
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CTL = 1 << 1, // Control
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SEG = 1 << 2, // Segment
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RES = 1 << 8, // Reserved for insternal use
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SYS = 1 << 9, // Reserved for supervisor mode
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};
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// FLG register
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enum
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{
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CF = 1 << 0, // Carry flag
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PF = 1 << 1, // Parity flag
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AC = 1 << 2, // Auxiliary flag
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ZF = 1 << 3, // Zero flag
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OV = 1 << 4, // Overflow flag
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DF = 1 << 5, // Direction flag
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SF = 1 << 6, // Sign flag
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2019-05-30 12:44:56 +02:00
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2019-05-29 16:57:22 +02:00
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UF = 1 << 16, // User-mode flag
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IF = 1 << 17, // Interrupts enable flag
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};
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struct reg_t
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{
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char *name;
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char *desc;
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char *conv;
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ulong val;
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ulong flags;
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};
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