2019-06-12 15:30:35 +02:00
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// The OS/K Team licenses this file to you under the MIT license.
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// See the LICENSE file in the project root for more information.
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#include <pc/arch.h>
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2019-07-02 20:57:40 +02:00
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#define ABS(x) ((short)(x) < 0 ? -x : x)
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2019-07-24 17:42:42 +02:00
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static const char *cond_suffixes[] =
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2019-06-12 15:30:35 +02:00
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{
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2019-06-12 15:36:52 +02:00
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"-",
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"c", "o", "z", "s", "p",
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2019-07-22 14:41:50 +02:00
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"be", "l", "le", "axz",
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"bxz", "cxz",
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2019-06-12 15:36:52 +02:00
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"?"
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2019-06-12 15:30:35 +02:00
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};
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2019-07-24 17:42:42 +02:00
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static void dump_acc(ctx_t *ctx, acc_t *p);
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2019-06-16 19:42:10 +02:00
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void dump_instr(ctx_t *ctx,
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instr_t *in,
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acc_t *p1,
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acc_t *p2,
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2019-07-01 21:46:36 +02:00
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acc_t *p3,
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2019-06-16 19:42:10 +02:00
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bool lock,
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2019-07-02 20:13:05 +02:00
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bool rep)
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{
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2019-07-02 20:13:05 +02:00
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uint cond = ctx->cond;
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2019-06-23 12:40:18 +02:00
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2019-07-24 16:52:26 +02:00
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trace("0x%lX:\t", ctx->cur_pc);
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2019-06-16 19:42:10 +02:00
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if (lock)
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2019-06-19 21:41:22 +02:00
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trace("lock");
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2019-06-16 19:42:10 +02:00
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2019-06-19 21:41:22 +02:00
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trace("%s", in->name);
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2019-06-16 19:44:34 +02:00
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2019-06-16 19:42:10 +02:00
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if (rep)
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2019-06-19 21:41:22 +02:00
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trace(".rep");
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2019-06-16 19:42:10 +02:00
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if (cond)
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{
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2019-06-19 21:41:22 +02:00
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trace(".");
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2019-06-16 19:42:10 +02:00
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if (cond & (1 << 4))
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2019-06-19 21:41:22 +02:00
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trace("n");
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2019-06-16 19:42:10 +02:00
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2019-07-08 17:48:45 +02:00
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assert((cond & ~(1 << 4)) <= sizeof(cond_suffixes)/sizeof(char *));
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2019-06-16 19:42:10 +02:00
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2019-07-08 17:48:45 +02:00
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trace("%s", cond_suffixes[cond & ~(1 << 4)]);
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2019-06-16 19:42:10 +02:00
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}
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2019-07-08 17:48:45 +02:00
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if (!rep && cond != ((1 << 4) | CD_CXZ))
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trace("\t\t");
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2019-06-16 19:42:10 +02:00
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else
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2019-06-19 21:41:22 +02:00
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trace("\t");
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2019-06-16 19:42:10 +02:00
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2019-06-16 19:52:32 +02:00
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if (p1)
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2019-06-16 19:42:10 +02:00
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dump_acc(ctx, p1);
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2019-07-01 21:46:36 +02:00
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if (p2) {
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trace(", ");
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dump_acc(ctx, p2);
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}
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if (p3) {
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trace(", ");
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dump_acc(ctx, p3);
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2019-06-16 19:44:34 +02:00
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}
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2019-06-16 19:42:10 +02:00
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2019-06-19 21:41:22 +02:00
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trace("\n");
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2019-06-16 19:42:10 +02:00
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}
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2019-07-24 17:42:42 +02:00
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static void dump_acc(ctx_t *ctx, acc_t *p)
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2019-06-12 15:30:35 +02:00
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{
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uint mfmt;
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2019-06-19 13:47:10 +02:00
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sym_t *sym;
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2019-06-12 15:30:35 +02:00
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if (p->type == A_REG)
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2019-06-19 21:41:22 +02:00
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trace("%s", ctx->r[p->reg].name);
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2019-06-12 15:30:35 +02:00
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else if (p->type == A_IMM64)
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2019-07-24 16:52:26 +02:00
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{
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if (p->val < 0xA) trace("%lu", p->val);
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else trace("0x%lX", p->val);
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}
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else if (p->type == A_IMM32)
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2019-06-14 16:47:01 +02:00
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{
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if (p->val < 0xA)
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2019-06-19 21:41:22 +02:00
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trace("%lu", p->val);
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2019-06-14 16:47:01 +02:00
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else
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{
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sym = find_sym_by_addr(p->val);
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if (sym)
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2019-06-19 21:41:22 +02:00
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trace("$%s(0x%lX)", sym->name, sym->addr);
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2019-06-19 13:47:10 +02:00
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else
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trace("0x%lX", p->val);
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2019-06-19 13:47:10 +02:00
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}
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2019-06-14 16:47:01 +02:00
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}
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2019-06-12 15:30:35 +02:00
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2019-07-24 16:52:26 +02:00
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else if (p->type == A_IMM16)
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{
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if (p->val < 0xA) trace("%lu", p->val);
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else trace("0x%hX", (ushort)p->val);
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}
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else if (p->type == A_IMM8)
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{
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if (p->val < 0xA) trace("%lu", p->val);
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else trace("0x%hhX", (uchar)p->val);
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}
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2019-06-12 15:30:35 +02:00
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else
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{
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2019-06-19 21:41:22 +02:00
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trace("%c[", getmempref(p->mlen));
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2019-06-12 15:30:35 +02:00
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2019-07-24 16:52:26 +02:00
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mfmt = p->type;
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2019-06-14 16:47:01 +02:00
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2019-07-24 16:52:26 +02:00
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if (mfmt == AM_RR)
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2019-06-12 15:30:35 +02:00
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{
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if (p->reg1 && p->reg2)
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2019-06-19 21:41:22 +02:00
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trace("%s+%s]", ctx->r[p->reg1].name, ctx->r[p->reg2].name);
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2019-06-12 15:30:35 +02:00
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2019-06-19 21:41:22 +02:00
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else trace("%s]", ctx->r[p->reg1 ? p->reg1 : p->reg2].name);
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2019-06-12 15:30:35 +02:00
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}
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else if (mfmt == AM_RRI)
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{
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if (p->reg1 && p->reg2)
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2019-07-24 16:52:26 +02:00
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trace("%s+%s%c%ld]",
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2019-07-02 20:57:40 +02:00
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ctx->r[p->reg1].name,
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ctx->r[p->reg2].name,
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2019-07-24 16:52:26 +02:00
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(p->imm2 < 0 ? '-' : '+'),
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2019-07-02 20:57:40 +02:00
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ABS(p->imm2));
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2019-07-24 16:52:26 +02:00
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else trace("%s%c%ld]",
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2019-07-02 20:57:40 +02:00
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ctx->r[p->reg1 ? p->reg1 : p->reg2].name,
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2019-07-24 16:52:26 +02:00
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(p->imm2 < 0 ? '-' : '+'),
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2019-07-02 20:57:40 +02:00
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ABS(p->imm2));
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2019-06-12 15:30:35 +02:00
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}
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else if (mfmt == AM_RRII)
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{
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if (p->reg1)
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2019-07-24 16:52:26 +02:00
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trace("%s+%s*%hhd%c%ld]",
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2019-06-12 15:30:35 +02:00
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ctx->r[p->reg1].name,
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2019-07-02 20:57:40 +02:00
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ctx->r[p->reg2].name, p->imm1,
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2019-07-24 16:52:26 +02:00
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(p->imm2 < 0 ? '-' : '+'),
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2019-07-02 20:57:40 +02:00
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ABS(p->imm2));
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2019-06-12 15:30:35 +02:00
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else
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2019-07-24 16:52:26 +02:00
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trace("%s*%hhd%c%ld]",
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2019-07-02 20:57:40 +02:00
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ctx->r[p->reg2].name, p->imm1,
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2019-07-24 16:52:26 +02:00
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(p->imm2 < 0 ? '-' : '+'),
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2019-07-02 20:57:40 +02:00
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ABS(p->imm2));
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2019-06-12 15:30:35 +02:00
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}
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}
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}
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