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kvisc
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This commit is contained in:
julianb0 2019-06-18 12:58:26 +02:00
parent c6779c0ea2
commit 7f22cd93da
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GPG Key ID: DDF8325C95299A62
12 changed files with 134 additions and 128 deletions
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21
ka/crt/fmt/_doprnt.k
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@ -1,23 +1,6 @@
; The OS/K Team licenses this file to you under the MIT license. ; The OS/K Team licenses this file to you under the MIT license.
; See the LICENSE file in the project root for more information. ; See the LICENSE file in the project root for more information.
_doprnt_test:
mov ax0, .fmt
sub rsp, 128
mov q[rsp+40], 0x7FE
mov q[rsp+32], -2
mov q[rsp+24], 666
mov q[rsp+16], 0x112233DDAA6677BB
mov q[rsp+8], 'K'
mov q[rsp], .str
call printf
add rsp, 128
ret
.fmt = "%% Hello World %s - %c - %p - %d - %d - %b"
.str = "(cc)"
; ;
; typedef int (*PUTC)(int ch) ; typedef int (*PUTC)(int ch)
; int _doprnt(PUTC putc, int n, const char *fmt, va_list ap) ; int _doprnt(PUTC putc, int n, const char *fmt, va_list ap)
@ -142,15 +125,15 @@ _doprnt:
jmp .print_number jmp .print_number
.print_number: .print_number:
; allocate itoa convertion buffer ; allocate itoa conversion buffer
sub rsp, 80 sub rsp, 80
mov rdi, rsp mov rdi, rsp
; assume modifier already set up ax2 and ax3 ; assume modifier already set up ax2 and ax3
mov ax0, rsp mov ax0, rsp
mov ax1, q[rsi + nx2 * 8] mov ax1, q[rsi + nx2 * 8]
inc nx2
call _itoa call _itoa
inc nx2
.print_itoa_buf: .print_itoa_buf:
mov ax0, b[rdi] mov ax0, b[rdi]

14
ka/crt/fmt/itoa.k
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@ -25,22 +25,22 @@ _itoa:
; make sure base is in [2, 32] ; make sure base is in [2, 32]
cmp ax2, 2 cmp ax2, 2
jmp.b .bad j.b .bad
cmp ax2, 36 cmp ax2, 36
jmp.a .bad j.a .bad
; deal with zero ; deal with zero
test ax1, ax1 test ax1, ax1
jmp.z .zero j.z .zero
; deal with base 10 signedness ; deal with base 10 signedness
test ax3, ax3 ; unsigned mode test ax3, ax3 ; unsigned mode
jmp.nz .conv j.nz .conv
cmp ax2, 10 ; base 10 cmp ax2, 10 ; base 10
jmp.nz .conv j.nz .conv
sgn lx0, ax1 ; extract ax1 sign sgn lx0, ax1 ; extract ax1 sign
@ -50,13 +50,13 @@ _itoa:
; main loop ; main loop
.conv: .conv:
test ax1, ax1 test ax1, ax1
jmp.z .fini j.z .fini
mov lx1, ax1 mov lx1, ax1
mod lx1, ax2 ; ax1 % base mod lx1, ax2 ; ax1 % base
cmp lx1, 9 ; lx1 > 9 ? cmp lx1, 9 ; lx1 > 9 ?
jmp.a .nondec j.a .nondec
add lx1, '0' add lx1, '0'
jmp .next jmp .next

9
ka/crt/fmt/printf.k
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@ -13,16 +13,11 @@ putc:
; int printf(const char *fmt, ...) ; int printf(const char *fmt, ...)
; ;
printf: printf:
enter 0
mov ax2, ax0 mov ax2, ax0
mov ax0, putc mov ax0, putc
mov ax1, STRLEN_MAX mov ax1, STRLEN_MAX
lea ax3, b[rbp+16] lea ax3, b[rsp+8]
call _doprnt jmp _doprnt
leave
ret
; ;
; Print a string ; Print a string

2
ka/crt/str/strcpy.k
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@ -27,7 +27,7 @@ strnzcpy:
ret.cxz ret.cxz
dec rcx dec rcx
jmp.cxz .1 j.cxz .1
movsb.rep.nz ax0, ax1 movsb.rep.nz ax0, ax1

2
ka/crt/str/strrev.k
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@ -54,7 +54,7 @@ strrev2:
; increase ax0 while decreasing ax1, performing exchanges ; increase ax0 while decreasing ax1, performing exchanges
.2: .2:
cmp ax0, ax1 cmp ax0, ax1
jmp.ae .3 j.ae .3
xchg b[ax0], b[ax1] xchg b[ax0], b[ax1]

24
ka/main.k
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@ -5,7 +5,7 @@
; Main function ; Main function
; ;
main: main:
call _doprnt_test call showoff
ret ret
showoff: showoff:
@ -15,8 +15,26 @@ showoff:
prn 10 prn 10
call str_test call str_test
call movzx_test call movzx_test
prn 10
call printf_test
ret ret
printf_test:
mov ax0, .fmt
sub rsp, 128
mov q[rsp+40], 0x7FE
mov q[rsp+32], -2
mov q[rsp+24], 666
mov q[rsp+16], 0x112233DDAA6677BB
mov q[rsp+8], 'K'
mov q[rsp], .str
call printf
add rsp, 128
ret
.fmt = "%% Hello World %s - %c - %p - %d - %d - %b"
.str = "(cc)"
strchr_test: strchr_test:
mov rax, 0 mov rax, 0
mov ax0, .str mov ax0, .str
@ -58,8 +76,8 @@ movzx_test:
movzx rsx, b[rsp] movzx rsx, b[rsp]
movzx rbi, w[rsp] movzx rbi, w[rsp]
movzx rdi, l[rsp] movzx rsi, l[rsp]
movzx rsi, q[rsp] movzx rdi, q[rsp]
leave leave
ret ret

7
ka/sys/memdev.k
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@ -3,14 +3,11 @@
MEMDEV := 1 MEMDEV := 1
MEMDEV_GETMEMOFF := 0
MEMDEV_GETMEMSIZE := 1
MEM.GetMemOff: MEM.GetMemOff:
iocall MEMDEV, MEMDEV_GETMEMOFF iocall MEMDEV, 0
ret ret
MEM.GetMemSize: MEM.GetMemSize:
iocall MEMDEV, MEMDEV_GETMEMSIZE iocall MEMDEV, 1
ret ret

4
vm/in/super.c
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@ -10,14 +10,14 @@
IMPL_START_0(cli) IMPL_START_0(cli)
{ {
CHK_SUPERV(); CHK_SUPERV();
flg &= ~IF; cr0 &= ~IF;
} }
IMPL_END; IMPL_END;
IMPL_START_0(sti) IMPL_START_0(sti)
{ {
CHK_SUPERV(); CHK_SUPERV();
flg |= IF; cr0 |= IF;
} }
IMPL_END; IMPL_END;

8
vm/pc/arch.h
View File

@ -41,7 +41,13 @@ void vlog(const char *, va_list);
struct ctx_t struct ctx_t
{ {
// Array of NREGS ulong's
ulong *rf;
// Register (names & types) table
reg_t *r; reg_t *r;
// Instruction table
instr_t *i; instr_t *i;
// Memory and memory size // Memory and memory size
@ -58,7 +64,7 @@ struct ctx_t
dev_t *dh; dev_t *dh;
}; };
#define R(X) ctx->r[X].val #define R(X) ctx->rf[X]
void dumpregs(ctx_t *); void dumpregs(ctx_t *);
void dumpinstr(ctx_t *, ulong, uint, ushort, acc_t *, acc_t *); void dumpinstr(ctx_t *, ulong, uint, ushort, acc_t *, acc_t *);

38
vm/pc/main.c
View File

@ -90,48 +90,70 @@ int main(int argc, char **argv)
exit(-3); exit(-3);
} }
fwprog = malloc(FWPROGSIZE);
fwfile = fopen(argv[1], "rb"); fwfile = fopen(argv[1], "rb");
if (!fwprog) {
log("Couldn't allocate firmware buffer\n");
exit(-1);
}
if (!fwfile) { if (!fwfile) {
log("Couldn't open program file\n"); log("Couldn't open program file\n");
exit(-2); exit(-2);
} }
fwprog = malloc(FWPROGSIZE);
if (!fwprog) {
log("Couldn't allocate firmware buffer\n");
exit(-1);
}
fwsize = fread(fwprog, 1, FWPROGSIZE, fwfile); fwsize = fread(fwprog, 1, FWPROGSIZE, fwfile);
if (fwsize < 2) { if (fwsize < 2) {
log("Program file too small or empty\n"); log("Program file too small or empty\n");
free(fwprog);
exit(-3); exit(-3);
} }
fclose(fwfile);
//
// Register frame allocation
//
main_ctx.rf = calloc(NREGS, sizeof(ulong));
//
// Memory allocation
//
main_ctx.mp = malloc(MEMSIZE + 16); main_ctx.mp = malloc(MEMSIZE + 16);
main_ctx.mz = MEMSIZE; main_ctx.mz = MEMSIZE;
main_ctx.get = bget; main_ctx.get = bget;
main_ctx.r[RIP].val = MEMOFF; main_ctx.rf[RIP] = MEMOFF;
if (main_ctx.mp == 0) { if (main_ctx.mp == 0) {
log("Couldn't allocate RAM\n"); log("Couldn't allocate RAM\n");
free(main_ctx.rf);
free(fwprog);
exit(-1); exit(-1);
} }
memcpy(&main_ctx.mp[addr2real(main_ctx.r[RIP].val)], fwprog, fwsize); memcpy(&main_ctx.mp[addr2real(main_ctx.rf[RIP])], fwprog, fwsize);
//
// Devices initialization
//
main_ctx.dh = 0; main_ctx.dh = 0;
if (devinitall(&main_ctx) < 0) { if (devinitall(&main_ctx) < 0) {
log("Couldn't initialize devices\n"); log("Couldn't initialize devices\n");
free(main_ctx.rf);
free(fwprog);
exit(-10); exit(-10);
} }
disable_stdin_echoing(); disable_stdin_echoing();
//
// Start decoding
//
while (1) { while (1) {
decode(&main_ctx); decode(&main_ctx);

129
vm/pc/regs.c
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@ -5,83 +5,70 @@
reg_t arch_r[] = reg_t arch_r[] =
{ {
// Invalid register { "inv", RES },
{ "inv", 0, RES }, { "rip", RES },
{ "flg", RES },
// Instruction pointer
{ "rip", 0, RES },
// Flags register
{ "flg", 0, RES },
// Stack registers { "rbp", GPR },
{ "rbp", 0, GPR }, { "rsp", GPR },
{ "rsp", 0, GPR },
// Reserved registers { "rx0", RES },
{ "rx0", 0, RES }, { "rx1", RES },
{ "rx1", 0, RES }, { "rx2", RES },
{ "rx2", 0, RES },
// General-purpose volatile registers { "rax", GPR },
{ "rax", 0, GPR }, { "rbx", GPR },
{ "rbx", 0, GPR }, { "rcx", GPR },
{ "rcx", 0, GPR }, { "rdx", GPR },
{ "rdx", 0, GPR }, { "rsx", GPR },
{ "rsx", 0, GPR }, { "rbi", GPR },
{ "rbi", 0, GPR }, { "rsi", GPR },
{ "rsi", 0, GPR }, { "rdi", GPR },
{ "rdi", 0, GPR },
// General-purpose non-volatile registers { "nx0", GPR },
{ "nx0", 0, GPR }, { "nx1", GPR },
{ "nx1", 0, GPR }, { "nx2", GPR },
{ "nx2", 0, GPR }, { "nx3", GPR },
{ "nx3", 0, GPR }, { "nx4", GPR },
{ "nx4", 0, GPR }, { "nx5", GPR },
{ "nx5", 0, GPR }, { "nx6", GPR },
{ "nx6", 0, GPR }, { "nx7", GPR },
{ "nx7", 0, GPR },
// Argument registers; volatile { "ax0", GPR },
{ "ax0", 0, GPR }, { "ax1", GPR },
{ "ax1", 0, GPR }, { "ax2", GPR },
{ "ax2", 0, GPR }, { "ax3", GPR },
{ "ax3", 0, GPR }, { "ax4", GPR },
{ "ax4", 0, GPR }, { "ax5", GPR },
{ "ax5", 0, GPR }, { "ax6", GPR },
{ "ax6", 0, GPR }, { "ax7", GPR },
{ "ax7", 0, GPR },
// Leaf function registers; volatile { "lx0", GPR },
{ "lx0", 0, GPR }, { "lx1", GPR },
{ "lx1", 0, GPR }, { "lx2", GPR },
{ "lx2", 0, GPR }, { "lx3", GPR },
{ "lx3", 0, GPR }, { "lx4", GPR },
{ "lx4", 0, GPR }, { "lx5", GPR },
{ "lx5", 0, GPR }, { "lx6", GPR },
{ "lx6", 0, GPR }, { "lx7", GPR },
{ "lx7", 0, GPR },
// Control register { "cr0", CTL },
{ "cr0", 0, CTL }, { "cr1", CTL },
{ "cr1", 0, CTL }, { "cr2", CTL },
{ "cr2", 0, CTL }, { "cr3", CTL },
{ "cr3", 0, CTL }, { "cr4", CTL },
{ "cr4", 0, CTL }, { "cr5", CTL },
{ "cr5", 0, CTL }, { "cr6", CTL },
{ "cr6", 0, CTL }, { "cr7", CTL },
{ "cr7", 0, CTL },
// System-reserved { "sa0", SYS },
{ "sa0", 0, SYS }, { "sa1", SYS },
{ "sa1", 0, SYS }, { "sa2", SYS },
{ "sa2", 0, SYS }, { "sa3", SYS },
{ "sa3", 0, SYS }, { "sa4", SYS },
{ "sa4", 0, SYS }, { "sa5", SYS },
{ "sa5", 0, SYS }, { "sa6", SYS },
{ "sa6", 0, SYS }, { "sa7", SYS },
{ "sa7", 0, SYS },
}; };
#define DUMPREGS(down, up) \ #define DUMPREGS(down, up) \
@ -89,7 +76,7 @@ reg_t arch_r[] =
if (i % 4 == 0) \ if (i % 4 == 0) \
log("\n"); \ log("\n"); \
r = &ctx->r[i]; \ r = &ctx->r[i]; \
log("%s=0x%-16lX ", r->name, r->val); \ log("%s=0x%-16lX ", r->name, R(i)); \
} \ } \
void dumpregs(ctx_t *ctx) void dumpregs(ctx_t *ctx)
@ -119,6 +106,6 @@ void dumpregs(ctx_t *ctx)
!!(flg&CF), !!(flg&OF), !!(flg&CF), !!(flg&OF),
!!(flg&ZF), !!(flg&SF), !!(flg&ZF), !!(flg&SF),
!!(flg&PF), !!(flg&DF), !!(flg&PF), !!(flg&DF),
!!(flg&IF), !!(cr0&UF)); !!(cr0&IF), !!(cr0&UF));
} }

4
vm/pc/regs.h
View File

@ -22,20 +22,18 @@ enum
PF = 1 << 4, // Parity flag PF = 1 << 4, // Parity flag
DF = 1 << 5, // Direction flag DF = 1 << 5, // Direction flag
IF = 1 << 16, // Interrupts enable flag
}; };
// CR0 register // CR0 register
enum enum
{ {
UF = 1 << 15, // User-mode flag UF = 1 << 15, // User-mode flag
IF = 1 << 16, // Interrupts enable flag
}; };
struct reg_t struct reg_t
{ {
char *name; char *name;
ulong val;
ulong flags; ulong flags;
}; };