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mirror of https://gitlab.os-k.eu/os-k-team/kvisc.git synced 2023-08-25 14:05:46 +02:00
This commit is contained in:
julianb0 2019-06-16 13:28:21 +02:00
parent a48473df92
commit 88396e0736
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GPG Key ID: DDF8325C95299A62
5 changed files with 105 additions and 36 deletions

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@ -8,7 +8,15 @@ main:
jmp bswap_test jmp bswap_test
bswap_test: bswap_test:
mov rdx, 0xFFEEDDCCBBAA99884433 mov rdx, 0x1122334455667788
bswap rax, rdx
mov rdi, 0x1111222233334444
wswap rsx, rdi
mov ax3, 0x1111111122222222
dswap ax0, ax3
ret ret
ramdev_test: ramdev_test:

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@ -519,6 +519,22 @@ cmc
clc clc
stc stc
#
# Load FLG register (LODF)
#
# $1 = FLG
#
lodf rm
#
# Store FLG register - lower byte only (STOFB)
#
# FLG[7:0] = $1[7:0]
#
# Note: FLG's lower byte contains CF, OF, ZF, SF, PF and DF
#
stofb rm
#---------------------------------------------------------------------------# #---------------------------------------------------------------------------#
# Byte-wise / bit-wise manipulation instructions # # Byte-wise / bit-wise manipulation instructions #
#---------------------------------------------------------------------------# #---------------------------------------------------------------------------#
@ -526,7 +542,7 @@ stc
# #
# Byte/word/dword swap (xSWAP) # Byte/word/dword swap (xSWAP)
# #
# Changes endianness # Change endianness
# #
bswap rm rim bswap rm rim
wswap rm rim wswap rm rim
@ -549,6 +565,13 @@ dswap rm rim
# #
nop nop
#
# CPU Identification Number
#
# Does nothing (for now)
#
cpuid
# #
# Get code/data offset (GCO/GCD) # Get code/data offset (GCO/GCD)
# #

55
vm/in/flags.c Normal file
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@ -0,0 +1,55 @@
// The OS/K Team licenses this file to you under the MIT license.
// See the LICENSE file in the project root for more information.
#include <in/instrs.h>
//----------------------------------------------------------------------------//
IMPL_START_0(cld)
{
flg &= ~DF;
}
IMPL_END;
IMPL_START_0(std)
{
flg |= DF;
}
IMPL_END;
//----------------------------------------------------------------------------//
IMPL_START_0(cmc)
{
flg = (flg&CF ? flg&~CF : flg|CF);
}
IMPL_END;
IMPL_START_0(clc)
{
flg &= ~CF;
}
IMPL_END;
IMPL_START_0(stc)
{
flg |= CF;
}
IMPL_END;
//----------------------------------------------------------------------------//
IMPL_START_1(lodf)
{
v1 = flg;
}
IMPL_OUT;
IMPL_START_1(stofb)
{
flg = (flg & ~0xFF) | (v1 & 0xFF);
}
IMPL_END;
//----------------------------------------------------------------------------//

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@ -24,40 +24,6 @@ IMPL_END;
//----------------------------------------------------------------------------// //----------------------------------------------------------------------------//
IMPL_START_0(cld)
{
flg &= ~DF;
}
IMPL_END;
IMPL_START_0(std)
{
flg |= DF;
}
IMPL_END;
//----------------------------------------------------------------------------//
IMPL_START_0(cmc)
{
flg = (flg&CF ? flg&~CF : flg|CF);
}
IMPL_END;
IMPL_START_0(clc)
{
flg &= ~CF;
}
IMPL_END;
IMPL_START_0(stc)
{
flg |= CF;
}
IMPL_END;
//----------------------------------------------------------------------------//
IMPL_START_0(clr) IMPL_START_0(clr)
{ {
rax = rbx = rcx = rdx = 0; rax = rbx = rcx = rdx = 0;
@ -74,3 +40,9 @@ IMPL_END;
//----------------------------------------------------------------------------// //----------------------------------------------------------------------------//
IMPL_START_0(cpuid)
{
}
IMPL_END;
//----------------------------------------------------------------------------//

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@ -3,6 +3,8 @@
#include <in/instrs.h> #include <in/instrs.h>
//----------------------------------------------------------------------------//
IMPL_START_2(bswap) IMPL_START_2(bswap)
{ {
v1 = ((v2 & 0xFF00000000000000) >> 56) v1 = ((v2 & 0xFF00000000000000) >> 56)
@ -18,10 +20,19 @@ IMPL_OUT;
IMPL_START_2(wswap) IMPL_START_2(wswap)
{ {
v1 = ((v2 & 0xFFFF000000000000) >> 48)
| ((v2 & 0x0000FFFF00000000) >> 16)
| ((v2 & 0x00000000FFFF0000) << 16)
| ((v2 & 0x000000000000FFFF) << 48);
} }
IMPL_OUT; IMPL_OUT;
IMPL_START_2(dswap) IMPL_START_2(dswap)
{ {
v1 = ((v2 & 0xFFFFFFFF00000000) >> 32)
| ((v2 & 0x00000000FFFFFFFF) << 32);
} }
IMPL_OUT; IMPL_OUT;
//----------------------------------------------------------------------------//