os-k-team
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kvisc
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vm

This commit is contained in:
julianb0 2019-08-16 13:29:38 +02:00
parent cbd079d2a0
commit b38eab6d76
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9 changed files with 52 additions and 77 deletions
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2
Makefile
View File

@ -11,7 +11,7 @@ all: kas
kpc: vm/Makefile
@cd vm && make --no-print-directory -s verbose=yes
kas: kpc as/regs.lst as/k-as.py
kas: kpc as/k-as.py
@cp vm/ob/instrs.lst as
dos: kas dosclean

52
as/k-as.py
View File

@ -25,7 +25,6 @@ instrs = TemporaryFile(mode="w+")
b_data = TemporaryFile(mode="w+b")
b_text = TemporaryFile(mode="w+b")
lst_regs = open(os.path.join(sys.path[0], "regs.lst"))
lst_instrs = open(os.path.join(sys.path[0], "instrs.lst"))
main_src = open(sys.argv[1])
@ -44,7 +43,6 @@ def leave(i):
b_data.close()
b_text.close()
main_src.close()
lst_regs.close()
lst_instrs.close()
sys.exit(i)
@ -53,9 +51,6 @@ def leave(i):
# Defines
pdefs = dict()
# registers
pregs = dict()
# instructions
pinstrs = list()
@ -79,6 +74,32 @@ pcurfile = sys.argv[1]
#-------------------------------------------------------------------------------
pregs = {
'$r0': 0, '$rax': 0, '$r1': 1, '$rbx': 1,
'$r2': 2, '$rcx': 2, '$r3': 3, '$rdx': 3,
'$r4': 4, '$rsi': 4, '$r5': 5, '$rdi': 5,
'$r6': 6, '$ax0': 6, '$r7': 7, '$ax1': 7,
'$r8': 8, '$ax2': 8, '$r9': 9, '$ax3': 9,
'$r10': 10, '$ax4': 10, '$r11': 11, '$ax5': 11,
'$r12': 12, '$nx0': 12, '$r13': 13, '$nx1': 13,
'$r14': 14, '$nx2': 14, '$r15': 15, '$nx3': 15,
'$r16': 16, '$nx4': 16, '$r17': 17, '$nx5': 17,
'$r18': 18, '$nx6': 18, '$r19': 19, '$nx7': 19,
'$r20': 20, '$nx8': 20, '$r21': 21, '$grp': 21,
'$r22': 22, '$trp': 22, '$r23': 23, '$srp': 23,
'$r24': 24, '$tmp': 24, '$r25': 25, '$rad': 25,
'$r26': 26, '$cr0': 26, '$r27': 27, '$cr1': 27,
'$r28': 28, '$rip': 28, '$r29': 29, '$rbp': 29,
'$r30': 30, '$rsp': 30, '$r31': 31, '$zero': 31,
}
def parse_lst_instrs():
global pinstrs
for _, line in enumerate(lst_instrs):
pinstrs.append(line.strip())
#-------------------------------------------------------------------------------
def name_valid(name):
for c in name.lower():
if not(c in 'abcdefghijklmnopqrstuvwxyz0123456789[$._+]=,'):
@ -103,26 +124,6 @@ def arith_eval(s):
#-------------------------------------------------------------------------------
def parse_lst_regs():
global pregs
i = 0
for _, line in enumerate(lst_regs):
line = line.strip()
if len(line) == 0:
continue
for reg in line.split():
pregs[reg] = i
i += 1
def parse_lst_instrs():
global pinstrs
for _, line in enumerate(lst_instrs):
pinstrs.append(line.strip())
#-------------------------------------------------------------------------------
inc_depth = 0
inc_depth_max = 16
@ -770,7 +771,6 @@ def genout():
#-------------------------------------------------------------------------------
parse_lst_instrs()
parse_lst_regs()
do_includes(main_src)
parse()
gentext()

39
as/regs.lst
View File

@ -1,39 +0,0 @@
$rax $r0
$rbx $r1
$rcx $r2
$rdx $r3
$rsi $r4
$rdi $r5
$ax0 $r6
$ax1 $r7
$ax2 $r8
$ax3 $r9
$ax4 $r10
$ax5 $r11
$nx0 $r12
$nx1 $r13
$nx2 $r14
$nx3 $r15
$nx4 $r16
$nx5 $r17
$nx6 $r18
$nx7 $r19
$nx8 $r20
$grp $r21
$trp $r22
$srp $r23
$tmp $r24
$rad $r25
$cr0 $r26
$cr1 $r27
$rip $r28
$rbp $r29
$rsp $r30
$zero $r31

3
vm/in/ALU
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@ -7,6 +7,7 @@
# Bitwise NOT
not 1
not 2
# Bitwise OR
or 2
@ -36,9 +37,11 @@ sar 3
# Negation
neg 1
neg 2
# Negation but traps on $src == -2^N
negv 1
negv 2
# Addition
add 2

1
vm/in/MEM
View File

@ -21,6 +21,7 @@ call 3
# POP(RIP)
#
ret 0
ret 1
#
# Make new stack frame (ENTER)

10
vm/in/MISC
View File

@ -11,14 +11,14 @@
# (cause register dump on standard error)
# (wait for user input before proceeeding)
#
break
break 0
#
# Toggles instruction dumping (DUMP)
#
# (toggles instruction dumping)
#
dump
dump 0
#---------------------------------------------------------------------------#
# Misc. instructions #
@ -27,13 +27,13 @@ dump
#
# Throws #UDF ("undefined behaviour")
#
udf
udf 0
#
# Pause the CPU for a very short amount of time (PAUSE)
# Used in spin-type loops
#
pause
pause 0
#
# Get timestamp in µseconds
@ -50,7 +50,7 @@ ytime 0
#
# Clear all GPR registers except RBP/RSP
#
cls
cls 0
#---------------------------------------------------------------------------#
# Byte-wise / bit-wise manipulation instructions #

3
vm/in/SUPER
View File

@ -58,9 +58,6 @@ trap 1
#
iret 0
cli 0
sti 0
#---------------------------------------------------------------------------#
# Device control instructions #
#---------------------------------------------------------------------------#

16
vm/in/alu.c
View File

@ -9,6 +9,7 @@
//----------------------------------------------------------------------------//
IMPL_START(not, 1) { SRCP(p1); *r1 = ~p1->val; return 1; }
IMPL_START(not, 2) { SRCP(p2); *r1 = ~p2->val; return 1; }
IMPL_START(or, 2) { SRCP(p1); SRCP(p2); *r1 = p1->val | p2->val; return 1; }
IMPL_START(or, 3) { SRCP(p2); SRCP(p3); *r1 = p2->val | p3->val; return 1; }
@ -41,6 +42,8 @@ IMPL_START(sar, 3) {
//----------------------------------------------------------------------------//
IMPL_START(neg, 1) { SRCP(p1); *r1 = ~p1->val + 1; return 1; }
IMPL_START(neg, 2) { SRCP(p2); *r1 = ~p2->val + 1; return 1; }
IMPL_START(negv, 1) {
SRCP(p1);
@ -52,6 +55,19 @@ IMPL_START(negv, 1) {
return 1;
}
IMPL_START(negv, 2) {
SRCP(p2);
if (p2->val == (1ul<<63))
_except(E_OVF, "Ineffective NEG operation (NEGV)");
*r1 = ~p2->val + 1;
return 1;
}
//----------------------------------------------------------------------------//
IMPL_START(add, 2) { SRCP(p1); SRCP(p2); *r1 = p1->val + p2->val; return 1; }
IMPL_START(add, 3) { SRCP(p2); SRCP(p3); *r1 = p2->val + p3->val; return 1; }

3
vm/in/super.c
View File

@ -56,9 +56,6 @@ IMPL_START(iret, 0) {
return 0;
}
IMPL_START(cli, 0) { CHK_SUPERV(); R(CR0) &= ~IF; return 0; }
IMPL_START(sti, 0) { CHK_SUPERV(); R(CR0) |= IF; return 0; }
//----------------------------------------------------------------------------//
//