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it's a trap!

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julianb0 2019-07-09 19:51:03 +02:00
parent 1fd3fdbf8e
commit cc4b8724cd
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GPG Key ID: DDF8325C95299A62
17 changed files with 252 additions and 188 deletions
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193
as/regs.lst
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@ -1,135 +1,70 @@
inv x0
flg x1
rip eip ip x2
rpc epc pc x3
inv
flg
rip eip ip
rpc epc pc
px0 p0 x4
px1 p1 x5
fc1 f1 x6
fc2 f2 x7
px0
px1
fc1
fc2
sa0 k0 x8
sa1 k1 x9
sa2 k2 x10
sa3 k3 x11
sa4 k4 x12
sa5 k5 x13
sa6 k6 x14
sa7 k7 x15
sa0 k0
sa1 k1
sa2 k2
sa3 k3
dr0 d0 x16
dr1 d1 x17
dr2 d2 x18
dr3 d3 x19
dr4 d4 x20
dr5 d5 x21
dr6 d6 x22
dr7 d7 x23
cr0 c0
cr1 c1
cr2 c2
cr3 c3
cr0 c0 x24
cr1 c1 x25
cr2 c2 x26
cr3 c3 x27
cr4 c4 x28
cr5 c5 x29
cr6 c6 x30
cr7 c7 x31
rax eax ax rx0 r0
rbx ebx bx rx1 r1
rcx ecx cx rx2 r2
rdx edx dx rx3 r3
rsi esi si rx4 r4
rdi edi di rx5 r5
rbp ebp bp rx6 r6
rsp esp sp rx7 r7
rx8 r8
rx9 r9
r10
r11
r12
r13
r14
r15
rax eax ax rx0 r0 x32
rbx ebx bx rx1 r1 x33
rcx ecx cx rx2 r2 x34
rdx edx dx rx3 r3 x35
rsi esi si rx4 r4 x36
rdi edi di rx5 r5 x37
rbp ebp bp rx6 r6 x38
rsp esp sp rx7 r7 x39
rx8 r8 x40
rx9 r9 x41
r10 x42
r11 x43
r12 x44
r13 x45
r14 x46
r15 x47
r16 x48
r17 x49
r18 x50
r19 x51
r20 x52
r21 x53
r22 x54
r23 x55
r24 x56
r25 x57
r26 x58
r27 x59
r28 x60
r29 x61
r30 x62
r31 x63
ax0 a0
ax1 a1
ax2 a2
ax3 a3
ax4 a4
ax5 a5
ax6 a6
ax7 a7
ax8 a8
ax9 a9
a10
a11
a12
a13
a14
a15
ax0 a0 x64
ax1 a1 x65
ax2 a2 x66
ax3 a3 x67
ax4 a4 x68
ax5 a5 x69
ax6 a6 x70
ax7 a7 x71
ax8 a8 x72
ax9 a9 x73
a10 x74
a11 x75
a12 x76
a13 x77
a14 x78
a15 x79
a16 x80
a17 x81
a18 x82
a19 x83
a20 x84
a21 x85
a22 x86
a23 x87
a24 x88
a25 x89
a26 x90
a27 x91
a28 x92
a29 x93
a30 x94
a31 x95
nx0 n0 x96
nx1 n1 x97
nx2 n2 x98
nx3 n3 x99
nx4 n4 x100
nx5 n5 x101
nx6 n6 x102
nx7 n7 x103
nx8 n8 x104
nx9 n9 x105
n10 x106
n11 x107
n12 x108
n13 x109
n14 x110
n15 x111
n16 x112
n17 x113
n18 x114
n19 x115
n20 x116
n21 x117
n22 x118
n23 x119
n24 x120
n25 x121
n26 x122
n27 x123
n28 x124
n29 x125
n30 x126
n31 x127
nx0 n0
nx1 n1
nx2 n2
nx3 n3
nx4 n4
nx5 n5
nx6 n6
nx7 n7
nx8 n8
nx9 n9
n10
n11
n12
n13
n14
n15

1
ka/crt/crt.k
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@ -4,6 +4,7 @@
;
; Include CRT librairies
;
include "crt/sys.k"
include "crt/limits.k"
include "crt/err/errno.k"
include "crt/fmt/format.k"

10
ka/crt/sys.k Normal file
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@ -0,0 +1,10 @@
; The OS/K Team licenses this file to you under the MIT license.
; See the LICENSE file in the project root for more information.
; Halt mode
Sys.HLT := 0x99
; DIR syscall
Sys.DIR := 0x100

26
ka/doskrnl.k
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@ -1,6 +1,12 @@
; The OS/K Team licenses this file to you under the MIT license.
; See the LICENSE file in the project root for more information.
__sysmain:
jmp start
include "crt/crt.k"
;
; Entry point
;
@ -10,20 +16,13 @@ start:
call main
call CMD.builtins.dir
hlt
mov ax0, Sys.DIR
trap 0
; Wait for and print input indefinitely
.1:
scan rax
xpause
mov ax0, Sys.HLT
trap 0
b.z rax, 0, .1
prn rax
jmp .1
include "crt/crt.k"
crash
;
; Disk Operating System
@ -33,6 +32,9 @@ include "sys/drv/cpudev.k"
include "sys/drv/memdev.k"
include "sys/drv/diskdev.k"
include "sys/intr/common.k"
include "sys/intr/trap0.k"
include "sys/tests.k"
include "sys/main.k"

26
ka/sys/intr/common.k Normal file
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@ -0,0 +1,26 @@
; The OS/K Team licenses this file to you under the MIT license.
; See the LICENSE file in the project root for more information.
TrapHandlers.prolog:
sub rsp, rbp, 56
mov q[rbp-8], r10
mov q[rbp-16], r11
mov q[rbp-24], r12
mov q[rbp-32], r13
mov q[rbp-40], r14
mov q[rbp-48], r15
jmp rax ; go back
TrapHandlers.epilog:
mov r10, q[rbp-8]
mov r11, q[rbp-16]
mov r12, q[rbp-24]
mov r13, q[rbp-32]
mov r14, q[rbp-40]
mov r15, q[rbp-48]
mov ax0, r11
call IDT.DoneHandling
iret

42
ka/sys/intr/trap0.k Normal file
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@ -0,0 +1,42 @@
; The OS/K Team licenses this file to you under the MIT license.
; See the LICENSE file in the project root for more information.
TRAP0_STACK := 0x300000
trap0_handler:
.init:
mov rax, .impl
mov rbp, TRAP0_STACK
jmp TrapHandlers.prolog
.impl:
mov ax0, r12
call RFS.LoadArgs
b.z ax0, Sys.HLT, .handle_HLT
b.z ax0, Sys.DIR, .handle_DIR
.fini:
jmp TrapHandlers.epilog
;
; Syscall implementations
;
.handle_DIR:
call CMD.builtins.dir
jmp .fini
.handle_HLT:
hlt
.HLT.loop:
xpause
scan rax
b.z rax, 0, .HLT.loop
prn rax
jmp .HLT.loop

20
ka/sys/main.k
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@ -9,10 +9,30 @@ PrintBootMsg:
.bootmsg = "Starting DOS...\n\n"
;
; Initialize TRAP handlers
;
InitSyscalls:
mov ax0, 1
.prepare_next:
call RFS.ActivateFrame
mov ax1, $rip
mov ax2, trap0_handler
call RFS.StoreReg
mov ax1, ax0
add ax0, 255 # TRAP no. (ax0 - 1)
call IDT.AddHandler
ret
;
; Main function
;
main:
call PrintBootMsg
call InitSyscalls
ret

14
vm/dv/CPUDEV
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@ -57,10 +57,16 @@ a certain E/I. If that same E/I happens again before that, the following happens
- if this E/I is #DBF (double fault), the system crashes ("triple fault")
- if this E/I is a hardware interrupt, it is queued (*** XXX ***)
When called, a handler will receive the number of the interrupt it is handling in RAX.
(in particular, if exception #25 happens and there are no handler for it, the handler
#0 that will be called will receive '25' in its RAX, not 0).
This is the value that must be passed to the 'initdone' iocall.
When called, a handler will receive the number of the E/I it is handling in R10,
and its own RFRAME ID in R11. (in particular, if exception #25 happens and there are no
handler for it, the handler #0 that will be called will receive '25' in R10, and '0' in R11).
R11 is the value that must be passed to the 'initdone' iocall.
The handler will also receive the previous RFRAME ID in R12, the previous RIP in R15 and the
previous RPC in R14. R13's content is meaningful only to the processor.
To return from an E/I, *after* having called 'idtdone', the handler must simply restore
R10-R15's values to what they were when the handler started executing, and then use
the 'IRET' instruction.
Clearing the interrupt flag prevents (and queues) maskable hardware interrupts

4
vm/in/MOV
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@ -79,11 +79,7 @@ rotl rm r r
#
# Load argument #N (LDARG)
#
# IF ($2 < 8) THEN
# $1 = AX$2
# ELSE
# $1 = LX($2-8)
# FI
#
# Throws:
# #ILL if $2 ≥ 16

5
vm/in/debug.c
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@ -21,6 +21,9 @@ IMPL_END;
IMPL_START_1(dump)
{
(void)v1;
#if 1
if (ctx->dumpsw && !v1)
trace("0x%lX:\t...\n", rpc);
@ -28,6 +31,8 @@ IMPL_START_1(dump)
dump_instr(ctx, ctx->cur_in, p1, p2, p3, 0, 0);
ctx->dumpsw = !!v1;
#endif
}
IMPL_END;

2
vm/in/mov.c
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@ -95,7 +95,7 @@ IMPL_OUT_3;
IMPL_START_2_ONLY(ldarg)
{
if (v2 < 32)
if (v2 < 16)
v1 = R(AX0 + v2);
else

14
vm/in/trap.c
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@ -12,14 +12,22 @@ IMPL_START_1(trap)
}
IMPL_END;
IMPL_START_0(into)
{
if (flg & OF)
_except(ctx, E_OVF, "INTO instruction with FLG.OF=1");
}
IMPL_END;
// XXX more checks
IMPL_START_0(iret)
{
rip = R(CR6);
rfs_current_idx = R(CR7);
ctx->rf = rfs[R(CR7)];
trace("\nReturning from exception #%ld\n\n", R(R11));
rip = R(R13);
rfs_current_idx = R(R12);
ctx->rf = rfs[R(R12)];
}
IMPL_END;

12
vm/la/kvisc.lang
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@ -56,17 +56,17 @@
<!-- KVISC -->
<keyword>(inv|flg|[re]?pc)</keyword>
<keyword>[re][a-z][xi]l?</keyword>
<keyword>[a-z]x[0-9]+[bwdlq]?</keyword>
<keyword>[re]?[abcd]xl?</keyword>
<keyword>[re]?[sd]il?</keyword>
<keyword>[re]?[sbi]pl?</keyword>
<keyword>[a-z]x?[0-9]+[bwdlq]?</keyword>
<!-- x86-64 -->
<keyword>[c-gs]s</keyword>
<keyword>[re]?flags</keyword>
<keyword>([gil]d)?tr</keyword>
<keyword>[re]?[sbi]pl?</keyword>
<keyword>[re]flags</keyword>
<keyword>([gil]d)tr</keyword>
<keyword>[x-z]mm[0-9]+</keyword>
<keyword>[re]?[a-d][xhl]</keyword>
<keyword>[a-z][0-9]+[bwdlq]?</keyword>
<keyword>(s[at]|[dc]r)[0-9]+</keyword>
</keyword-list>

13
vm/pc/except.c
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@ -12,7 +12,7 @@ void _except(ctx_t *ctx, int _code, char *fmt, ...)
uint code = _code;
uint effcode;
ulong orig_frame;
ulong orig_frame, orig_rpc, orig_rip;
logerr("\nException %u - ", code);
@ -83,14 +83,19 @@ void _except(ctx_t *ctx, int _code, char *fmt, ...)
if (rfs[handler] != NULL)
{
orig_frame = rfs_current_idx;
orig_rpc = rpc;
orig_rip = rip;
ctx->rf = rfs[handler];
rfs_current_idx = handler;
fc2 = 0;
rax = code;
R(CR6) = rip;
R(CR7) = orig_frame;
R(R10) = code;
R(R11) = effcode;
R(R12) = orig_frame;
R(R13) = rip;
R(R14) = orig_rpc;
R(R15) = orig_rip;
idt_handling[effcode]++;

1
vm/pc/except.h
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@ -21,6 +21,7 @@ enum
E_IMP, // Not implemented
E_ALI, // Alignment error
E_BRK, // Ctrl+C or similar
E_OVF, // INTO instruction
NEXCPTS
};

34
vm/pc/regs.c
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@ -8,38 +8,44 @@ reg_t arch_r[] =
{ "inv", RES }, { "flg", GPR }, { "rip", GPR }, { "rpc", GPR },
{ "px0", RES }, { "px1", RES }, { "fc1", RES }, { "fc2", RES },
{ "sa0", SYS }, { "sa1", SYS }, { "sa2", SYS }, { "sa3", SYS },
{ "sa4", SYS }, { "sa5", SYS }, { "sa6", SYS }, { "sa7", SYS },
{ "dr0", SYS }, { "dr1", SYS }, { "dr2", SYS }, { "dr3", SYS },
{ "dr4", SYS }, { "dr5", SYS }, { "dr6", SYS }, { "dr7", SYS },
{ "cr0", CTL }, { "cr1", CTL }, { "cr2", CTL }, { "cr3", CTL },
{ "cr4", CTL }, { "cr5", CTL }, { "cr6", CTL }, { "cr7", CTL },
{ "rax", GPR }, { "rbx", GPR }, { "rcx", GPR }, { "rdx", GPR },
{ "rsi", GPR }, { "rdi", GPR }, { "rbp", GPR }, { "rsp", GPR },
{ "rx8", GPR }, { "rx9", GPR }, { "r10", GPR }, { "r11", GPR },
{ "r12", GPR }, { "r13", GPR }, { "r14", GPR }, { "r15", GPR },
{ "r16", GPR }, { "r17", GPR }, { "r18", GPR }, { "r19", GPR },
{ "r20", GPR }, { "r21", GPR }, { "r22", GPR }, { "r23", GPR },
{ "r24", GPR }, { "r25", GPR }, { "r26", GPR }, { "r27", GPR },
{ "r28", GPR }, { "r29", GPR }, { "r30", GPR }, { "r31", GPR },
{ "ax0", GPR }, { "ax1", GPR }, { "ax2", GPR }, { "ax3", GPR },
{ "ax4", GPR }, { "ax5", GPR }, { "ax6", GPR }, { "ax7", GPR },
{ "ax8", GPR }, { "ax9", GPR }, { "a10", GPR }, { "a11", GPR },
{ "a12", GPR }, { "a13", GPR }, { "a14", GPR }, { "a15", GPR },
{ "a16", GPR }, { "a17", GPR }, { "a18", GPR }, { "a19", GPR },
{ "a20", GPR }, { "a21", GPR }, { "a22", GPR }, { "a23", GPR },
{ "a24", GPR }, { "a25", GPR }, { "a26", GPR }, { "a27", GPR },
{ "a28", GPR }, { "a29", GPR }, { "a30", GPR }, { "a31", GPR },
{ "nx0", GPR }, { "nx1", GPR }, { "nx2", GPR }, { "nx3", GPR },
{ "nx4", GPR }, { "nx5", GPR }, { "nx6", GPR }, { "nx7", GPR },
{ "nx8", GPR }, { "nx9", GPR }, { "n10", GPR }, { "n11", GPR },
{ "n12", GPR }, { "n13", GPR }, { "n14", GPR }, { "n15", GPR },
// { "dr0", SYS }, { "dr1", SYS }, { "dr2", SYS }, { "dr3", SYS },
// { "sa4", SYS }, { "sa5", SYS }, { "sa6", SYS }, { "sa7", SYS },
// { "dr4", SYS }, { "dr5", SYS }, { "dr6", SYS }, { "dr7", SYS },
// { "cr4", CTL }, { "cr5", CTL }, { "cr6", CTL }, { "cr7", CTL },
/*
{ "r16", GPR }, { "r17", GPR }, { "r18", GPR }, { "r19", GPR },
{ "r20", GPR }, { "r21", GPR }, { "r22", GPR }, { "r23", GPR },
{ "r24", GPR }, { "r25", GPR }, { "r26", GPR }, { "r27", GPR },
{ "r28", GPR }, { "r29", GPR }, { "r30", GPR }, { "r31", GPR },
{ "a16", GPR }, { "a17", GPR }, { "a18", GPR }, { "a19", GPR },
{ "a20", GPR }, { "a21", GPR }, { "a22", GPR }, { "a23", GPR },
{ "a24", GPR }, { "a25", GPR }, { "a26", GPR }, { "a27", GPR },
{ "a28", GPR }, { "a29", GPR }, { "a30", GPR }, { "a31", GPR },
{ "n16", GPR }, { "n17", GPR }, { "n18", GPR }, { "n19", GPR },
{ "n20", GPR }, { "n21", GPR }, { "n22", GPR }, { "n23", GPR },
{ "n24", GPR }, { "n25", GPR }, { "n26", GPR }, { "n27", GPR },
{ "n28", GPR }, { "n29", GPR }, { "n30", GPR }, { "n31", GPR },
*/
};
static_assert(NREGS <= 256, "");
@ -69,8 +75,8 @@ void dumpregs(ctx_t *ctx)
DUMPREGS(NX0, N15);
trace("\n");
DUMPREGS(SA0, SA7);
DUMPREGS(CR0, CR7);
DUMPREGS(SA0, SA3);
DUMPREGS(CR0, CR3);
trace("\n\nrip=0x%-16lX rpc=0x%-16lX rsp=0x%-16lX rbp=0x%-16lX",

19
vm/pc/regs.h
View File

@ -40,24 +40,25 @@ struct reg_t
enum
{
INV, FLG, RIP, RPC, PX0, PX1, FC1, FC2,
SA0, SA1, SA2, SA3, SA4, SA5, SA6, SA7,
DR0, DR1, DR2, DR3, DR4, DR5, DR6, DR7,
CR0, CR1, CR2, CR3, CR4, CR5, CR6, CR7,
SA0, SA1, SA2, SA3, // SA4, SA5, SA6, SA7,
CR0, CR1, CR2, CR3, // CR4, CR5, CR6, CR7,
RAX, RBX, RCX, RDX, RSI, RDI, RBP, RSP,
RX8, RX9, R10, R11, R12, R13, R14, R15,
R16, R17, R18, R19, R20, R21, R22, R23,
R24, R25, R26, R27, R28, R29, R30, R31,
AX0, AX1, AX2, AX3, AX4, AX5, AX6, AX7,
AX8, AX9, A10, A11, A12, A13, A14, A15,
A16, A17, A18, A19, A20, A21, A22, A23,
A24, A25, A26, A27, A28, A29, A30, A31,
NX0, NX1, NX2, NX3, NX4, NX5, NX6, NX7,
NX8, NX9, N10, N11, N12, N13, N14, N15,
N16, N17, N18, N19, N20, N21, N22, N23,
N24, N25, N26, N27, N28, N29, N30, N31,
// DR0, DR1, DR2, DR3, DR4, DR5, DR6, DR7,
// R16, R17, R18, R19, R20, R21, R22, R23,
// R24, R25, R26, R27, R28, R29, R30, R31,
// A16, A17, A18, A19, A20, A21, A22, A23,
// A24, A25, A26, A27, A28, A29, A30, A31,
// N16, N17, N18, N19, N20, N21, N22, N23,
// N24, N25, N26, N27, N28, N29, N30, N31,
NREGS
};