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stuff
This commit is contained in:
parent
5b3527067f
commit
dd4d337de1
2
Makefile
2
Makefile
@ -6,7 +6,7 @@ all: k.exe
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src = instr/instrs.c karch/decd.c karch/main.c karch/regs.c
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src = instr/instrs.c karch/decd.c karch/main.c karch/regs.c
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obj = $(patsubst %.c,%.o,$(src))
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obj = $(patsubst %.c,%.o,$(src))
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%.o: %.c instrs/i_arch.h */*.h
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%.o: %.c instrs/i_arch.h */*.h */*.c
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@gcc -O2 -Wall -I./karch -c $< -o $@
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@gcc -O2 -Wall -I./karch -c $< -o $@
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instrs/i_arch.h: instr/INSTRS instr/instrs.py
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instrs/i_arch.h: instr/INSTRS instr/instrs.py
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@ -1,6 +1,8 @@
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# The OS/K Team licences this file to you under the MIT license.
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# The OS/K Team licences this file to you under the MIT license.
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# See the LICENSE file in the project root for more information.
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# See the LICENSE file in the project root for more information.
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nop
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add r r
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add r r
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add r i
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add r i
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add r m
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add r m
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@ -3,6 +3,11 @@
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#include "instrs.h"
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#include "instrs.h"
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IMPL_START_0(nop)
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{
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}
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IMPL_END;
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IMPL_START_2(add)
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IMPL_START_2(add)
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{
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{
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v1 += v2;
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v1 += v2;
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@ -53,7 +53,7 @@ for _, line in enumerate(fi):
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hd.write("#define I_{} {}\n".format(name.upper(), count))
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hd.write("#define I_{} {}\n".format(name.upper(), count))
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hd.write("#ifdef _NEED_ARCH_I\n")
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hd.write("#ifdef _NEED_ARCH_I\n")
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hd.write('{{ "{}", "{}", {}, {}, i_{} }},\n'\
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hd.write('{{ "{}", "{}", {}, {}, i_{} }},\n'\
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.format(tok[0], name, p1, p2, tok[0]))
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.format(tok[0].strip(), name, p1, p2, tok[0]))
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hd.write("#endif\n\n")
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hd.write("#endif\n\n")
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count = count + 1
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count = count + 1
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57
karch/arch.h
57
karch/arch.h
@ -1,14 +1,18 @@
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// The OS/K Team licenses this file to you under the MIT license.
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// The OS/K Team licenses this file to you under the MIT license.
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// See the LICENSE file in the project root for more information.
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// See the LICENSE file in the project root for more information.
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#include <assert.h>
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#include <stdio.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include <string.h>
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#include <assert.h>
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#include <stdarg.h>
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#define log printf
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#define log printf
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#define vlog vprintf
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#define packed __attribute__ ((__packed__))
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#define packed __attribute__ ((__packed__))
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#define static_assert _Static_assert
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#define static_assert _Static_assert
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#define alignof _Alignof
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typedef unsigned int bool;
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typedef unsigned int bool;
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typedef unsigned char uchar;
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typedef unsigned char uchar;
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@ -28,7 +32,7 @@ enum
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R08, R09, R10, R11, R12, R13, R14, R15,
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R08, R09, R10, R11, R12, R13, R14, R15,
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K00, K01, K02, K03, K04, K05, K06, K07,
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K00, K01, K02, K03, K04, K05, K06, K07,
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CR0, CR1, CR2, CR3, CR4, CR5, CR6, CR7,
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CR0, CR1, CR2, CR3, CR4, CR5, CR6, CR7,
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RIP, FLG,
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RIP, FLG, RET,
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NREGS
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NREGS
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};
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};
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@ -83,7 +87,7 @@ struct ctx_t
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instr_t *i;
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instr_t *i;
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// Memory and memory size
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// Memory and memory size
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uchar *mp;
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ushort *mp;
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ulong mz;
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ulong mz;
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// Read next instruction
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// Read next instruction
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@ -92,24 +96,61 @@ struct ctx_t
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enum
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enum
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{
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{
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E_ILL, // Ill-formed
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E_SHT, // Shutdown instruction
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E_IMP, // Not implemented
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E_IMP, // Not implemented
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E_ILL, // Ill-formed
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E_ACC, // Invalid access
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E_ACC, // Invalid access
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E_SYS, // Supervisor only
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E_SYS, // Supervisor only
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E_SHT, // Shutdown instruction
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E_ALI, // Alignment error
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NEXCPTS
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NEXCPTS
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};
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};
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void dumpregs(ctx_t *ctx);
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void dumpregs(ctx_t *ctx);
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static inline void _except(ctx_t *ctx, int code, char *str)
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static inline void _except(ctx_t *ctx, int code, char *fmt, ...)
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{
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{
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log("\nException %d - %s\n", code, str);
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va_list ap;
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log("\nException %d - ", code);
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va_start(ap, fmt);
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vlog(fmt, ap);
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va_end(ap);
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log("\n");
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dumpregs(ctx);
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dumpregs(ctx);
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exit(code);
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free(ctx->mp);
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exit(code+1);
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}
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}
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void decode(ctx_t *ctx);
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void decode(ctx_t *ctx);
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#define MEMOFF (1 * 1024 * 1024)
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#define MEMSIZE (16 * 1024 * 1024) // 16MB
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#define addr2real(p) ((p) - MEMOFF)
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#define real2addr(p) ((p) + MEMOFF)
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static inline ulong readmem64(ctx_t *ctx, ulong addr)
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{
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ulong real = addr2real(addr);
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if (addr % alignof(ulong) > 0) {
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_except(ctx, E_ALI, "Non-aligned memory access");
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}
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if (addr < MEMOFF || real >= MEMSIZE) {
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_except(ctx, E_ACC, "Accessing inexistent memory");
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}
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ulong val = (ulong)ctx->mp[real++];
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val = (val << 16) | (ulong)ctx->mp[real++];
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val = (val << 16) | (ulong)ctx->mp[real++];
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val = (val << 16) | (ulong)ctx->mp[real++];
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return val;
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}
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#include "../instr/arch_i.h"
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#include "../instr/arch_i.h"
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11
karch/decd.c
11
karch/decd.c
@ -63,11 +63,11 @@ void dumpregs(ctx_t *ctx)
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log("\n");
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log("\n");
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}
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}
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void dumpinstr(ctx_t *ctx, ushort c, acc_t *p1, acc_t *p2)
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void dumpinstr(ctx_t *ctx, ulong rip, ushort c, acc_t *p1, acc_t *p2)
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{
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{
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acc_t *p = 0;
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acc_t *p = 0;
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instr_t *i = &ctx->i[c];
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instr_t *i = &ctx->i[c];
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log("%s", i->name);
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log("0x%016lX: %s", rip, i->name);
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if (i->prm1 != NOPRM)
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if (i->prm1 != NOPRM)
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p = p1;
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p = p1;
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@ -95,7 +95,8 @@ void decode(ctx_t *ctx)
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{
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{
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instr_t *i;
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instr_t *i;
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acc_t p1 = { 0 }, p2 = { 0 };
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acc_t p1 = { 0 }, p2 = { 0 };
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ulong rip = ctx->r[RIP].val;
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ushort c = ctx->get(ctx);
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ushort c = ctx->get(ctx);
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if (c == 0xFFFF) {
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if (c == 0xFFFF) {
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@ -107,7 +108,7 @@ void decode(ctx_t *ctx)
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}
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}
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else if (!ISINSTR(c)) {
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else if (!ISINSTR(c)) {
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_except(ctx, E_ILL, "Bad opcode");
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_except(ctx, E_ILL, "Bad opcode 0x%4hX", c);
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}
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}
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// Scanning an instruction
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// Scanning an instruction
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@ -122,7 +123,7 @@ void decode(ctx_t *ctx)
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}
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}
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}
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}
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dumpinstr(ctx, c, &p1, &p2);
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dumpinstr(ctx, rip, c, &p1, &p2);
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i->func(ctx, &p1, &p2);
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i->func(ctx, &p1, &p2);
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}
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}
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30
karch/main.c
30
karch/main.c
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#include "arch.h"
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#include "arch.h"
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ushort prog[] = {
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ushort fwprog[] = {
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I_ADD_R_I, RDX, A_IMM32, 0xAABB, 0xCCDD,
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I_ADD_R_I, RDX, A_IMM32, 0xAABB, 0xCCDD,
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I_MOV_R_R, RAX, RDX,
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I_MOV_R_R, RAX, RDX,
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I_MOV_R_I, RBX, A_IMM64, 0x7777, 0x6666, 0x5555, 0x4444,
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I_MOV_R_I, RBX, A_IMM64, 0x7777, 0x6666, 0x5555, 0x4444,
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@ -15,13 +15,15 @@ ushort prog[] = {
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ushort bget(ctx_t *ctx)
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ushort bget(ctx_t *ctx)
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{
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{
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static int i = 0;
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if (addr2real(ctx->r[RIP].val) >= MEMSIZE) {
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_except(ctx, E_ACC, "Executing out of memory");
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if (i >= sizeof(prog)/sizeof(ushort)) {
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_except(ctx, E_ACC, "End of text");
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}
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}
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return prog[i++];
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ushort c = ctx->mp[addr2real(ctx->r[RIP].val)];
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ctx->r[RIP].val++;
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return c;
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}
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}
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extern reg_t arch_r[NREGS];
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extern reg_t arch_r[NREGS];
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@ -34,12 +36,22 @@ int main(void)
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main_ctx.r = arch_r;
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main_ctx.r = arch_r;
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main_ctx.i = arch_i;
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main_ctx.i = arch_i;
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main_ctx.mp = 0;
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main_ctx.mp = malloc(MEMSIZE);
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main_ctx.mz = 0;
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main_ctx.mz = MEMSIZE;
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main_ctx.get = bget;
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main_ctx.get = bget;
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main_ctx.r[RIP].val = MEMOFF;
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if (main_ctx.mp == 0) {
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log("Couldn't allocate RAM");
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exit(-1);
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}
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memcpy(&main_ctx.mp[addr2real(main_ctx.r[RIP].val)], fwprog, sizeof(fwprog));
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memset(&main_ctx.mp[addr2real(main_ctx.r[RIP].val) + sizeof(fwprog)/2], 0xFF, 0xFF);
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while (1) {
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while (1) {
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decode(&main_ctx);
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decode(&main_ctx);
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}
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}
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@ -39,5 +39,6 @@ reg_t arch_r[NREGS] =
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{ "cr7", "Control register 7", 0, CTL },
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{ "cr7", "Control register 7", 0, CTL },
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{ "rip", "Instruction pointer", 0, RES },
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{ "rip", "Instruction pointer", 0, RES },
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{ "flg", "Flags register", 0, RES },
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{ "flg", "Flags register", 0, RES },
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{ "ret", "Return address", 0, RES },
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};
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};
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