// The OS/K Team licenses this file to you under the MIT license.
// See the LICENSE file in the project root for more information.

#include "../arch.h"

#define IMPL_START_0(name)                                                  \
void i_##name(ctx_t *ctx, acc_t *p1, acc_t *p2)                             \
{

#define IMPL_START_1(name)                                                  \
void i_##name(ctx_t *ctx, acc_t *p1, acc_t *p2)                             \
{                                                                           \
    ulong v1 = (p1->type == A_REG ? R(p1->val) : p1->val);                  \
    if (p1->mem) v1 = readmem(ctx, v1 + p1->off, p1->mlen);

#define IMPL_START_2(name)                                                  \
void i_##name(ctx_t *ctx, acc_t *p1, acc_t *p2)                             \
{                                                                           \
    ulong v1 = (p1->type == A_REG ? R(p1->val) : p1->val);                  \
    ulong v2 = (p2->type == A_REG ? R(p2->val) : p2->val);                  \
    if (p1->mem) v1 = readmem(ctx, v1 + p1->off, p1->mlen);                 \
    if (p2->mem) v2 = readmem(ctx, v2 + p2->off, p2->mlen);

#define IMPL_START_3(name)                                                  \
void i_##name(ctx_t *ctx, acc_t *p1, acc_t *p2)                             \
{                                                                           \
    ulong v2 = (p2->type == A_REG ? R(p2->val) : p2->val);                 \
    if (p2->mem) v2 = readmem(ctx, v2 + p2->off, p2->mlen);

#define IMPL_OUT                                                            \
    assert(p1->type == A_REG || p1->mem);                                   \
    if (p1->mem) {                                                          \
        ulong addr = p1->type == A_REG ? R(p1->val) : p1->val;              \
        writemem(ctx, v1, addr + p1->off, p1->mlen);                        \
    }                                                                       \
    else R(p1->val) = v1;                                                   \
}

#define IMPL_END                                                            \
}

//
// c...z instructions easy implementation
//

#define IMPL_CxxxZ(name)                                                    \
IMPL_START_0(c##name##z)                                                    \
{                                                                           \
    if (flg & ZF) {                                                         \
        i_##name(ctx, p1, p2);                                              \
    }                                                                       \
}                                                                           \
IMPL_END

#define IMPL_CxxxNZ(name)                                                   \
IMPL_START_0(c##name##nz)                                                   \
{                                                                           \
    if (!(flg & ZF)) {                                                      \
        i_##name(ctx, p1, p2);                                              \
    }                                                                       \
}                                                                           \
IMPL_END

#define IMPL_COND(name)                                                     \
    IMPL_CxxxZ(name);                                                       \
    IMPL_CxxxNZ(name)

//
// Consistency checks
//

#define CHK_SUPERV()                                                        \
    do {                                                                    \
        if ((cr0 & UF) == 1) {                                              \
            _except(ctx, E_SYS, "Supervisor-only INSTR");                   \
        }                                                                   \
    } while (0)

#define CHK_STACK(op)                                                       \
    if (rsp % 8 > 0 || rbp % 8 > 0) {                                       \
       _except(ctx, E_STK, "Misaligned stack REGS");                        \
    }                                                                       \
    if (rbp op rsp) {                                                       \
        _except(ctx, E_STK, "RSP above RBP");                               \
    }


//
// Common operations
//

#define PUSH(v)                                                             \
    writemem64(ctx, v, rsp);                                                \
    rsp -= 8;

#define POP(v)                                                              \
    rsp += 8;                                                               \
    v = readmem64(ctx, rsp);

#define JUMP(v)                                                             \
    rip = v + cr1