// The OS/K Team licenses this file to you under the MIT license.
// See the LICENSE file in the project root for more information.

// Register types
enum
{
    GPR = 1 << 0,   // General
    CTL = 1 << 1,   // Control
    SEG = 1 << 2,   // Segment
    RES = 1 << 8,   // Reserved for insternal use
    SYS = 1 << 9,   // Reserved for supervisor mode
};

// FLG register
enum
{
    CF = 1 << 0,        // Carry flag
    OF = 1 << 1,        // Overflow flag

    ZF = 1 << 2,        // Zero flag
    SF = 1 << 3,        // Sign flag

    PF = 1 << 4,        // Parity flag
    DF = 1 << 5,        // Direction flag
};

// CR0 register
enum
{
    IF = 1 << 0,       // Interrupts-enable flag
    UF = 1 << 1,       // User-mode flag
};

struct reg_t
{
    char   *name;
    ulong   flags;
};

enum
{
    INV, FLG, RIP, RPC, PX0, PX1, FC1, FC2,
    SA0, SA1, SA2, SA3, SA4, SA5, SA6, SA7,
    DR0, DR1, DR2, DR3, DR4, DR5, DR6, DR7,
    CR0, CR1, CR2, CR3, CR4, CR5, CR6, CR7,

    RAX, RBX, RCX, RDX, RSI, RDI, RBP, RSP,
    RX8, RX9, R10, R11, R12, R13, R14, R15,
    R16, R17, R18, R19, R20, R21, R22, R23,
    R24, R25, R26, R27, R28, R29, R30, R31,

    AX0, AX1, AX2, AX3, AX4, AX5, AX6, AX7,
    AX8, AX9, A10, A11, A12, A13, A14, A15,
    A16, A17, A18, A19, A20, A21, A22, A23,
    A24, A25, A26, A27, A28, A29, A30, A31,

    NX0, NX1, NX2, NX3, NX4, NX5, NX6, NX7,
    NX8, NX9, N10, N11, N12, N13, N14, N15,
    N16, N17, N18, N19, N20, N21, N22, N23,
    N24, N25, N26, N27, N28, N29, N30, N31,

    NREGS
};

#define fc0 ctx->ninstrs

#define inv R(INV)
#define rip R(RIP)
#define rpc R(RPC)
#define flg R(FLG)
#define fc1 R(FC1)
#define fc2 R(FC2)
#define cr0 R(CR0)
#define cr1 R(CR1)
#define cr2 R(CR2)

#define rax R(RAX)
#define rbx R(RBX)
#define rcx R(RCX)
#define rdx R(RDX)
#define rsi R(RSI)
#define rdi R(RDI)
#define rbp R(RBP)
#define rsp R(RSP)

#define ax0 R(AX0)
#define ax1 R(AX1)
#define ax2 R(AX2)
#define ax3 R(AX3)