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44 lines
1.6 KiB
C
44 lines
1.6 KiB
C
// The OS/K Team licenses this file to you under the MIT license.
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// See the LICENSE file in the project root for more information.
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#include "arch.h"
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reg_t arch_r[NREGS] =
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{
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{ "rax", "Accumulator 0", 0, GPR },
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{ "rbx", "Accumulator 1", 0, GPR },
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{ "rcx", "Accumulator 2", 0, GPR },
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{ "rdx", "Accumulator 3", 0, GPR },
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{ "rdi", "Accumulator 4", 0, GPR },
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{ "rsi", "Accumulator 5", 0, GPR },
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{ "rbp", "Stack base", 0, GPR },
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{ "rsp", "Stack pointer", 0, GPR },
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{ "r08", "Accumulator 8", 0, GPR },
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{ "r09", "Accumulator 9", 0, GPR },
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{ "r10", "Accumulator 10", 0, GPR },
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{ "r11", "Accumulator 11", 0, GPR },
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{ "r12", "Accumulator 12", 0, GPR },
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{ "r13", "Accumulator 13", 0, GPR },
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{ "r14", "Accumulator 14", 0, GPR },
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{ "r15", "Accumulator 15", 0, GPR },
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{ "k00", "Supervisor accumulator 0", 0, SYS },
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{ "k01", "Supervisor accumulator 1", 0, SYS },
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{ "k02", "Supervisor accumulator 2", 0, SYS },
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{ "k03", "Supervisor accumulator 3", 0, SYS },
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{ "k04", "Supervisor accumulator 4", 0, SYS },
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{ "k05", "Supervisor accumulator 5", 0, SYS },
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{ "k06", "Supervisor accumulator 6", 0, SYS },
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{ "k07", "Supervisor accumulator 7", 0, SYS },
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{ "cr0", "Control register 0", 0, CTL },
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{ "cr1", "Control register 1", 0, CTL },
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{ "cr2", "Control register 2", 0, CTL },
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{ "cr3", "Control register 3", 0, CTL },
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{ "cr4", "Control register 4", 0, CTL },
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{ "cr5", "Control register 5", 0, CTL },
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{ "cr6", "Control register 6", 0, CTL },
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{ "cr7", "Control register 7", 0, CTL },
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{ "rip", "Instruction pointer", 0, RES },
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{ "flg", "Flags register", 0, RES },
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};
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