mirror of
https://gitlab.os-k.eu/os-k-team/kvisc.git
synced 2023-08-25 14:05:46 +02:00
162 lines
8.3 KiB
C
162 lines
8.3 KiB
C
// The OS/K Team licenses this file to you under the MIT license.
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// See the LICENSE file in the project root for more information.
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#include <pc/arch.h>
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#include <in/arch_i.h>
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#define DECV(p, v) \
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ulong v = (p->type == A_REG ? R(p->val) : p->val); \
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if (p->mem) { \
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v = readmem(ctx, v + p->off + R(p->offreg), p1->mlen); \
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}
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#define IMPL_START_0(name) \
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void i_##name(ctx_t *ctx, acc_t *p1, acc_t *p2) \
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{
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#define IMPL_START_1(name) \
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void i_##name(ctx_t *ctx, acc_t *p1, acc_t *p2) \
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{ \
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DECV(p1, v1);
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#define IMPL_START_2(name) \
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void i_##name(ctx_t *ctx, acc_t *p1, acc_t *p2) \
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{ \
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DECV(p1, v1); \
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DECV(p2, v2);
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#define IMPL_START_3(name) \
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void i_##name(ctx_t *ctx, acc_t *p1, acc_t *p2) \
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{ \
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DECV(p2, v2);
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#define IMPL_OUT \
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assert(p1->type == A_REG || p1->mem); \
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if (p1->mem) { \
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ulong addr = p1->type == A_REG ? R(p1->val) : p1->val; \
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writemem(ctx, v1, addr + p1->off + R(p1->offreg), p1->mlen); \
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} \
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else R(p1->val) = v1; \
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}
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#define IMPL_OUT_2 \
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assert(p1->type == A_REG || p1->mem); \
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if (p1->mem) { \
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ulong addr = p1->type == A_REG ? R(p1->val) : p1->val; \
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writemem(ctx, v1, addr + p1->off + R(p1->offreg), p1->mlen); \
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} \
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else R(p1->val) = v1; \
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\
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assert(p2->type == A_REG || p2->mem); \
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if (p2->mem) { \
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ulong addr = p2->type == A_REG ? R(p2->val) : p2->val; \
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writemem(ctx, v2, addr + p2->off + R(p2->offreg), p2->mlen); \
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} \
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else R(p2->val) = v2; \
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}
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#define IMPL_END \
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}
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//
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// c...z instructions easy implementation
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//
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#define IMPL_CxxxZ(name) \
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IMPL_START_0(c##name##z) \
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{ \
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if (flg & ZF) { \
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i_##name(ctx, p1, p2); \
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} \
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} \
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IMPL_END
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#define IMPL_CxxxNZ(name) \
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IMPL_START_0(c##name##nz) \
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{ \
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if (!(flg & ZF)) { \
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i_##name(ctx, p1, p2); \
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} \
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} \
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IMPL_END
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#define IMPL_CxxxA(name) \
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IMPL_START_0(c##name##a) \
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{ \
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if (!(flg & ZF) && !(flg & CF)) { \
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i_##name(ctx, p1, p2); \
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} \
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} \
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IMPL_END
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#define IMPL_CxxxAE(name) \
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IMPL_START_0(c##name##ae) \
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{ \
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if (!(flg & CF)) { \
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i_##name(ctx, p1, p2); \
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} \
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} \
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IMPL_END
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#define IMPL_CxxxB(name) \
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IMPL_START_0(c##name##b) \
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{ \
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if (!(flg & ZF) && (flg & CF)) { \
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i_##name(ctx, p1, p2); \
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} \
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} \
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IMPL_END
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#define IMPL_CxxxBE(name) \
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IMPL_START_0(c##name##be) \
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{ \
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if (flg & CF) { \
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i_##name(ctx, p1, p2); \
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} \
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} \
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IMPL_END
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#define IMPL_COND(name) \
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IMPL_CxxxZ(name); \
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IMPL_CxxxA(name); \
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IMPL_CxxxB(name); \
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IMPL_CxxxNZ(name); \
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IMPL_CxxxAE(name); \
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IMPL_CxxxBE(name)
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//
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// Consistency checks
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//
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#define CHK_SUPERV() \
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do { \
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if ((cr0 & UF) == 1) { \
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_except(ctx, E_SYS, "Supervisor-only INSTR"); \
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} \
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} while (0)
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#define CHK_STACK(op) \
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if (rsp % 8 > 0 || rbp % 8 > 0) { \
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_except(ctx, E_STK, "Misaligned stack REGS"); \
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} \
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if (rbp op rsp) { \
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_except(ctx, E_STK, "RSP above RBP"); \
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}
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//
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// Common operations
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//
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#define PUSH(v) \
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writemem64(ctx, v, rsp); \
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rsp -= 8;
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#define POP(v) \
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rsp += 8; \
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v = readmem64(ctx, rsp);
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#define JUMP(v) \
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rip = v + cr1
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