44 lines
1.6 KiB
C
44 lines
1.6 KiB
C
// The OS/K Team licenses this file to you under the MIT license.
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// See the LICENSE file in the project root for more information.
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#include "arch.h"
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reg_t arch_r[NREGS] =
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{
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{ "RAX", "Accumulator 0", 0, GPR },
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{ "RBX", "Accumulator 1", 0, GPR },
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{ "RCX", "Accumulator 2", 0, GPR },
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{ "RDX", "Accumulator 3", 0, GPR },
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{ "RDI", "Accumulator 4", 0, GPR },
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{ "RSI", "Accumulator 5", 0, GPR },
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{ "RBP", "Stack base", 0, GPR },
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{ "RSP", "Stack pointer", 0, GPR },
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{ "R08", "Accumulator 8", 0, GPR },
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{ "R09", "Accumulator 9", 0, GPR },
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{ "R10", "Accumulator 10", 0, GPR },
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{ "R11", "Accumulator 11", 0, GPR },
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{ "R12", "Accumulator 12", 0, GPR },
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{ "R13", "Accumulator 13", 0, GPR },
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{ "R14", "Accumulator 14", 0, GPR },
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{ "R15", "Accumulator 15", 0, GPR },
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{ "K00", "Supervisor accumulator 0", 0, SYS },
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{ "K01", "Supervisor accumulator 1", 0, SYS },
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{ "K02", "Supervisor accumulator 2", 0, SYS },
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{ "K03", "Supervisor accumulator 3", 0, SYS },
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{ "K04", "Supervisor accumulator 4", 0, SYS },
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{ "K05", "Supervisor accumulator 5", 0, SYS },
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{ "K06", "Supervisor accumulator 6", 0, SYS },
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{ "K07", "Supervisor accumulator 7", 0, SYS },
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{ "CR0", "Control register 0", 0, CTL },
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{ "CR1", "Control register 1", 0, CTL },
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{ "CR2", "Control register 2", 0, CTL },
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{ "CR3", "Control register 3", 0, CTL },
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{ "CR4", "Control register 4", 0, CTL },
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{ "CR5", "Control register 5", 0, CTL },
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{ "CR6", "Control register 6", 0, CTL },
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{ "CR7", "Control register 7", 0, CTL },
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{ "RIP", "Instruction pointer", 0, RES },
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{ "RFG", "Flags register", 0, RES },
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};
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