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112 lines
1.9 KiB
C
112 lines
1.9 KiB
C
// The OS/K Team licenses this file to you under the MIT license.
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// See the LICENSE file in the project root for more information.
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// Register types
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enum
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{
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GPR = 1 << 0, // General
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CTL = 1 << 1, // Control
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SEG = 1 << 2, // Segment
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RES = 1 << 8, // Reserved for insternal use
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SYS = 1 << 9, // Reserved for supervisor mode
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};
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// FLG register
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enum
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{
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CF = 1 << 0, // Carry flag
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OF = 1 << 1, // Overflow flag
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ZF = 1 << 2, // Zero flag
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SF = 1 << 3, // Sign flag
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PF = 1 << 4, // Parity flag
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DF = 1 << 5, // Direction flag
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IF = 1 << 16, // Interrupts enable flag
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};
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// CR0 register
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enum
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{
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UF = 1 << 15, // User-mode flag
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};
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struct reg_t
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{
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char *name;
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ulong val;
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ulong flags;
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};
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enum
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{
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INV = 0,
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RIP, FLG, RBP, RSP,
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RX0, RX1, RX2,
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#define inv R(INV)
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#define rip R(RIP)
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#define flg R(FLG)
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#define rbp R(RBP)
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#define rsp R(RSP)
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RAX, RBX, RCX, RDX,
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RSX, RBI, RSI, RDI,
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#define rax R(RAX)
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#define rbx R(RBX)
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#define rcx R(RCX)
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#define rdx R(RDX)
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#define rsx R(RSX)
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#define rbi R(RBI)
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#define rsi R(RSI)
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#define rdi R(RDI)
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NX0, NX1, NX2, NX3,
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NX4, NX5, NX6, NX7,
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#define nx0 R(NX0)
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#define nx1 R(NX1)
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#define nx2 R(NX2)
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#define nx3 R(NX3)
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AX0, AX1, AX2, AX3,
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AX4, AX5, AX6, AX7,
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#define ax0 R(AX0)
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#define ax1 R(AX1)
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#define ax2 R(AX2)
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#define ax3 R(AX3)
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#define ax4 R(AX4)
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#define ax5 R(AX5)
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#define ax6 R(AX6)
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#define ax7 R(AX7)
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LX0, LX1, LX2, LX3,
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LX4, LX5, LX6, LX7,
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#define lx0 R(LX0)
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#define lx1 R(LX1)
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#define lx2 R(LX2)
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#define lx3 R(LX3)
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#define lx4 R(LX4)
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#define lx5 R(LX5)
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#define lx6 R(LX6)
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#define lx7 R(LX7)
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CR0, CR1, CR2, CR3,
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CR4, CR5, CR6, CR7,
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#define cr0 R(CR0)
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#define cr1 R(CR1)
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#define cr2 R(CR2)
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#define cr3 R(CR3)
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SA0, SA1, SA2, SA3,
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SA4, SA5, SA6, SA7,
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#define sa0 R(SA0)
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#define sa1 R(SA1)
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#define sa2 R(SA2)
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#define sa3 R(SA3)
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NREGS
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};
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