91 lines
1.9 KiB
C
91 lines
1.9 KiB
C
// The OS/K Team licenses this file to you under the MIT license.
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// See the LICENSE file in the project root for more information.
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// Register types
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enum
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{
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GPR = 1 << 0, // General
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CTL = 1 << 1, // Control
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SEG = 1 << 2, // Segment
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RES = 1 << 8, // Reserved for insternal use
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SYS = 1 << 9, // Reserved for supervisor mode
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};
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// FLG register
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enum
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{
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CF = 1 << 0, // Carry flag
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OF = 1 << 1, // Overflow flag
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ZF = 1 << 2, // Zero flag
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SF = 1 << 3, // Sign flag
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PF = 1 << 4, // Parity flag
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DF = 1 << 5, // Direction flag
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};
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// CR0 register
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enum
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{
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IF = 1 << 0, // Interrupts-enable flag
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UF = 1 << 1, // User-mode flag
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};
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struct reg_t
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{
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char *name;
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ulong flags;
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};
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enum
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{
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INV, FLG, RIP, RPC, PX0, PX1, FC1, FC2,
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SA0, SA1, SA2, SA3, SA4, SA5, SA6, SA7,
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DR0, DR1, DR2, DR3, DR4, DR5, DR6, DR7,
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CR0, CR1, CR2, CR3, CR4, CR5, CR6, CR7,
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RAX, RBX, RCX, RDX, RSI, RDI, RBP, RSP,
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RX8, RX9, R10, R11, R12, R13, R14, R15,
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R16, R17, R18, R19, R20, R21, R22, R23,
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R24, R25, R26, R27, R28, R29, R30, R31,
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AX0, AX1, AX2, AX3, AX4, AX5, AX6, AX7,
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AX8, AX9, A10, A11, A12, A13, A14, A15,
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A16, A17, A18, A19, A20, A21, A22, A23,
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A24, A25, A26, A27, A28, A29, A30, A31,
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NX0, NX1, NX2, NX3, NX4, NX5, NX6, NX7,
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NX8, NX9, N10, N11, N12, N13, N14, N15,
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N16, N17, N18, N19, N20, N21, N22, N23,
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N24, N25, N26, N27, N28, N29, N30, N31,
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NREGS
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};
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#define fc0 ctx->ninstrs
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#define inv R(INV)
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#define rip R(RIP)
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#define rpc R(RPC)
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#define flg R(FLG)
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#define fc1 R(FC1)
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#define fc2 R(FC2)
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#define cr0 R(CR0)
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#define cr1 R(CR1)
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#define cr2 R(CR2)
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#define rax R(RAX)
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#define rbx R(RBX)
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#define rcx R(RCX)
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#define rdx R(RDX)
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#define rsi R(RSI)
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#define rdi R(RDI)
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#define rbp R(RBP)
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#define rsp R(RSP)
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#define ax0 R(AX0)
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#define ax1 R(AX1)
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#define ax2 R(AX2)
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#define ax3 R(AX3)
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