mirror of
https://gitlab.os-k.eu/os-k-team/kvisc.git
synced 2023-08-25 14:05:46 +02:00
54 lines
1.9 KiB
C
54 lines
1.9 KiB
C
// The OS/K Team licenses this file to you under the MIT license.
|
|
// See the LICENSE file in the project root for more information.
|
|
|
|
#include <pc/device.h>
|
|
|
|
reg_t arch_r[] =
|
|
{
|
|
{ "zero", GPR }, { "cr0", SYS }, { "cr1", SYS }, { "cr2", SYS },
|
|
{ "rfx", GPR }, { "rip", GPR }, { "rbp", GPR }, { "rsp", GPR },
|
|
|
|
{ "rax", GPR }, { "rbx", GPR }, { "rcx", GPR }, { "rdx", GPR },
|
|
{ "rsi", GPR }, { "rdi", GPR }, { "ax0", GPR }, { "ax1", GPR },
|
|
{ "ax2", GPR }, { "ax3", GPR }, { "ax4", GPR }, { "ax5", GPR },
|
|
|
|
{ "r12", GPR }, { "r13", GPR }, { "r14", GPR }, { "r15", GPR },
|
|
{ "r16", GPR }, { "r17", GPR }, { "r18", GPR }, { "r19", GPR },
|
|
{ "r20", GPR }, { "grp", GPR }, { "trp", GPR }, { "srp", SYS },
|
|
};
|
|
|
|
static_assert(sizeof(arch_r)/sizeof(reg_t) == NREGS, "");
|
|
|
|
#define TRACE logerr
|
|
|
|
void dumpregs()
|
|
{
|
|
TRACE("Current RFRAME index: #%lu", rfs_current_idx);
|
|
|
|
TRACE("\n\nEnviron #1:");
|
|
TRACE("\nrpc=0x%-16lX rip=0x%-16lX rfx=0x%-16lX", ctx->cur_pc, R(RIP), R(RFX));
|
|
TRACE("\ncr0=0x%-16lX cr1=0x%-16lX cr2=0x%-16lX", R(CR0), R(CR1), R(CR2));
|
|
|
|
TRACE("\n\nEnviron #2:");
|
|
TRACE("\nrsp=0x%-16lX rbp=0x%-16lX ins=0d%-16lu", R(RSP), R(RBP), ctx->ninstrs);
|
|
TRACE("\ngrp=0x%-16lX trp=0x%-16lX srp=0x%-16lX", R(GRP), R(TRP), R(SRP));
|
|
|
|
TRACE("\n\nArgument:");
|
|
TRACE("\nax0=0x%-16lX ax1=0x%-16lX ax2=0x%-16lX", R(AX0), R(AX1), R(AX2));
|
|
TRACE("\nax3=0x%-16lX ax4=0x%-16lX ax5=0x%-16lX", R(AX3), R(AX4), R(AX5));
|
|
|
|
TRACE("\n\nVolatile:");
|
|
TRACE("\nrax=0x%-16lX rbx=0x%-16lX rcx=0x%-16lX", R(RAX), R(RBX), R(RCX));
|
|
TRACE("\nrdx=0x%-16lX rsi=0x%-16lX rdi=0x%-16lX", R(RDX), R(RSI), R(RDI));
|
|
|
|
TRACE("\n\nPersistent:");
|
|
TRACE("\nr12=0x%-16lX r13=0x%-16lX r14=0x%-16lX", R(R12), R(R13), R(R14));
|
|
TRACE("\nr15=0x%-16lX r16=0x%-16lX r17=0x%-16lX", R(R15), R(R16), R(R17));
|
|
TRACE("\nr18=0x%-16lX r19=0x%-16lX r20=0x%-16lX", R(R18), R(R19), R(R20));
|
|
|
|
TRACE("\n");
|
|
|
|
assert(R(RZX) == 0);
|
|
}
|
|
|