2019-02-16 23:36:33 +01:00
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//----------------------------------------------------------------------------//
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// GNU GPL OS/K //
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// //
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2019-05-13 23:22:27 +02:00
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// Desc: Inline assembly functions //
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2019-02-16 23:36:33 +01:00
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// //
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// //
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2020-02-06 14:23:26 +01:00
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// Copyright © 2018-2020 The OS/K Team //
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2019-02-16 23:36:33 +01:00
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// //
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// This file is part of OS/K. //
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// //
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// OS/K is free software: you can redistribute it and/or modify //
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// it under the terms of the GNU General Public License as published by //
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// the Free Software Foundation, either version 3 of the License, or //
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// any later version. //
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// //
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// OS/K is distributed in the hope that it will be useful, //
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// but WITHOUT ANY WARRANTY//without even the implied warranty of //
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the //
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// GNU General Public License for more details. //
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// //
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// You should have received a copy of the GNU General Public License //
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// along with OS/K. If not, see <https://www.gnu.org/licenses/>. //
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//----------------------------------------------------------------------------//
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2019-05-13 23:22:27 +02:00
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#ifndef _LIBC_H
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#include <libc.h>
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2019-02-16 23:36:33 +01:00
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#endif
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2019-05-13 23:22:27 +02:00
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#ifndef _ASM_H
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#define _ASM_H
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2019-02-16 23:36:33 +01:00
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//------------------------------------------//
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2019-04-21 21:18:13 +02:00
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// IRQ-related stuff //
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//------------------------------------------//
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2019-05-19 00:07:01 +02:00
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//
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// Launch interrupt
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//
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#define interrupt(n) asm volatile ("int %0" : : "N" (n) : "cc", "memory")
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2019-04-21 21:18:13 +02:00
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//
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// Returns whether IRQs are enabled
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//
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static inline bool KeCheckIRQStatus(void) {
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ulong flags;
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asm volatile ("pushf\n\tpop %0" : "=g"(flags) );
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return flags & (1 << 9);
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}
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//
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// Disables IRQs
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//
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#define KeDisableIRQs() asm volatile ("cli")
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//
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// Enables IRQs
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//
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#define KeEnableIRQs() asm volatile ("sti")
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//
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// Disables IRQs, but saves its previous state
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//
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static inline ulong KePauseIRQs(void) {
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ulong flags;
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asm volatile ("pushf\n\tcli\n\tpop %0" : "=r"(flags) : : "memory");
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return flags;
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}
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2019-05-14 11:48:07 +02:00
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extern void KeSendEOItoPIC(uchar isr);
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extern void KeEnableNMI(void);
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extern void KeDisableNMI(void);
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2019-04-24 23:00:12 +02:00
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2019-04-21 21:18:13 +02:00
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//
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// Restore IRQ flag to its state before KePauseIRQs
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//
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#define KeRestoreIRQs(flags) asm("push %0\n\tpopf" : : "rm"(flags) : "memory","cc")
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//------------------------------------------//
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// 101 ways to hang the system //
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//------------------------------------------//
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2019-05-13 23:22:27 +02:00
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//
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// Just relaxes the CPU a few cycles
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//
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#define KeRelaxCPU() asm volatile("pause\n": : : "memory")
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2019-04-21 21:18:13 +02:00
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//
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// Pauses CPU until next interuption
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//
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#define KePauseCPU() asm volatile ("sti\n\thlt")
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//
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// Halts the CPU indefinitely
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//
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#define KeHaltCPU() do { asm volatile ("hlt"); } while (1)
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//
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// Halts the system, making sure it won't recover
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//
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#define KeCrashSystem() do { KeDisableIRQs(); KeHaltCPU(); } while (1)
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//------------------------------------------//
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// Ports I/O //
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//------------------------------------------//
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2019-05-13 23:22:27 +02:00
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static inline void IoWriteByteOnPort(ushort port, uchar val)
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2019-04-21 21:18:13 +02:00
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{ asm volatile ("outb %1, %0" : : "dN" (port), "a" (val)); }
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2019-02-16 23:36:33 +01:00
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2019-05-13 23:22:27 +02:00
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static inline void IoWriteWordOnPort(ushort port, ushort val)
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2019-05-07 23:16:56 +02:00
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{ asm volatile ("outw %1, %0" : : "dN" (port), "a" (val)); }
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2019-05-13 23:22:27 +02:00
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static inline void IoWriteDWordOnPort(ushort port, uint val)
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2019-05-07 23:16:56 +02:00
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{ asm volatile ("outl %1, %0" : : "dN" (port), "a" (val)); }
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2019-05-13 23:22:27 +02:00
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static inline uchar IoReadByteFromPort(ushort port) {
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2019-04-21 21:18:13 +02:00
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uchar ret;
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asm volatile ("inb %1, %0" : "=a"(ret) : "Nd"(port));
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return ret;
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2019-02-16 23:36:33 +01:00
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}
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2019-05-13 23:22:27 +02:00
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static inline ushort IoReadWordFromPort(ushort port) {
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2019-04-21 21:18:13 +02:00
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ushort ret;
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asm volatile ("inw %1, %0" : "=a"(ret) : "Nd"(port));
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return ret;
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2019-02-16 23:36:33 +01:00
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}
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2019-05-13 23:22:27 +02:00
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static inline ushort IoReadDWordFromPort(ushort port) {
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2019-04-21 21:18:13 +02:00
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uint ret;
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asm volatile ("inl %1, %0" : "=a"(ret) : "Nd"(port));
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return ret;
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2019-02-16 23:36:33 +01:00
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}
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2019-05-22 23:32:44 +02:00
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static inline ulong KeReadStsc(void) {
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int eax, edx;
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asm volatile ("rdtsc":"=a"(eax),"=d"(edx));
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return ((ulong)edx << 32) + eax;
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}
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2020-01-09 20:58:57 +01:00
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static inline void KeFlushTlbSingle(ulong addr)
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2020-01-08 00:28:10 +01:00
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{
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asm volatile("invlpg (%0)" ::"r" (addr) : "memory");
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}
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2019-02-16 23:36:33 +01:00
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//------------------------------------------//
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2019-04-21 21:18:13 +02:00
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// Misc. I/O //
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//------------------------------------------//
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//
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// Wait for completion of some I/O operation
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// Port 0x80 is used for 'checkpoints' during POST
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//
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#define IoWaitCompletion() IoWriteByteOnPort(0x80, 0)
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2019-02-16 23:36:33 +01:00
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#endif
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