From 362e90d380cdb5e2569d35b8a522d6a52e1a939a Mon Sep 17 00:00:00 2001
From: Antoine Cure <tinei@protonmail.com>
Date: Wed, 12 Feb 2020 17:48:05 +0100
Subject: [PATCH] PCI cleanup

---
 include/io/pci.h       |  2 +-
 kaleid/kernel/io/pci.c | 24 ++++++++++++++++--------
 2 files changed, 17 insertions(+), 9 deletions(-)

diff --git a/include/io/pci.h b/include/io/pci.h
index 0fd4c7b..67b635d 100644
--- a/include/io/pci.h
+++ b/include/io/pci.h
@@ -48,7 +48,7 @@
 //----------------------------------------------------------------------------//
 
 void IoInitPCI();
-void pciScanAll();
+void IoPciEnumerate();
 
 
 #endif
diff --git a/kaleid/kernel/io/pci.c b/kaleid/kernel/io/pci.c
index 9222561..094e761 100644
--- a/kaleid/kernel/io/pci.c
+++ b/kaleid/kernel/io/pci.c
@@ -30,7 +30,8 @@
 void* pciConfigBaseAddress = NULL;
 
 
-static inline void* pciGetConfigAddr(uchar bus, uchar device, uchar function, ushort offset)
+static inline void* pciGetConfigAddr(uchar bus, uchar device, 
+                                     uchar function, ushort offset)
 {
     if(device > 32) {
         KernLog("pciGetConfigAddr(): bad device ID\n");
@@ -45,25 +46,29 @@ static inline void* pciGetConfigAddr(uchar bus, uchar device, uchar function, us
         return 0;
     }
     
-    return (void*)(bus*32*8*4096 + device*8*4096 + function*4096 + offset + (ulong)pciConfigBaseAddress);
+    return (void*)(bus*32*8*4096 + device*8*4096 + function*4096 + 
+    offset + (ulong)pciConfigBaseAddress);
 }
 
-uchar pciReadConfigByte(uchar bus, uchar device, uchar function, ushort offset)
+static inline uchar pciReadConfigByte(uchar bus, uchar device, 
+                                      uchar function, ushort offset)
 {
     return *((uchar*)(pciGetConfigAddr(bus, device, function, offset)));
 }
 
-ushort pciReadConfigWord(uchar bus, uchar device, uchar function, ushort offset)
+static inline ushort pciReadConfigWord(uchar bus, uchar device, 
+                                       uchar function, ushort offset)
 {
     return *((ushort*)(pciGetConfigAddr(bus, device, function, offset)));
 }
 
-uint pciReadConfigDWord(uchar bus, uchar device, uchar function, ushort offset)
+static inline uint pciReadConfigDWord(uchar bus, uchar device, 
+                                      uchar function, ushort offset)
 {
     return *((uint*)(pciGetConfigAddr(bus, device, function, offset)));
 }
 
-void pciScanAll()
+void IoPciEnumerate()
 {
     if(pciConfigBaseAddress == NULL) {
         KernLog("Unable to access PCI configuration : MCFG table not reachable\n");
@@ -75,7 +80,10 @@ void pciScanAll()
             for(uchar function = 0; function < 8; function++) {
                 ushort vendor = pciReadConfigWord(bus, device, function, PCI_REG_VENDOR);
                 if(vendor == 0xffff) continue;
-                DebugLog("PCI device found ! vendor: %x, device: %x\n", vendor, pciReadConfigWord(bus, device, function, PCI_REG_DEVICE));
+                DebugLog("PCI device found ! vendor: %x, device: %x\n",
+                         vendor,
+                         pciReadConfigWord(bus, device, function, PCI_REG_DEVICE)
+                        );
             }
         }
     }
@@ -91,7 +99,7 @@ void IoInitPCI()
     pciConfigBaseAddress = MCFG_table->pciConfigBaseAddress;
     DebugLog("PCI Config Base address = 0x%p\n", pciConfigBaseAddress);
     
-    pciScanAll();
+    IoPciEnumerate();
 }