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mirror of https://gitlab.os-k.eu/os-k-team/os-k.git synced 2023-08-25 14:03:10 +02:00

Cleanup in boot

This commit is contained in:
Adrien Bourmault 2020-01-15 16:26:44 +01:00
parent 7a7d458bc6
commit 25b5eb6c78
2 changed files with 17 additions and 24 deletions

View File

@ -23,43 +23,36 @@
; along with OS/K. If not, see <https://www.gnu.org/licenses/>. ;
;=----------------------------------------------------------------------------=;
%define MAX_MEMORY 1 ; GiB
[BITS 32]
[section .text]
; ---------------------------------------------------------------------------- ;
; Constructor for the page tables in protected mode ;
; ---------------------------------------------------------------------------- ;
Setup_paging:
;; Map the first PML4 entry to PDP table
;; Map first PML4 entry to PDP table
mov eax, PDP_table
or eax, 1 << 1 | 1 << 0 ; present + writable
or eax, 0b11 ; Present + writable
mov [PML4_table], eax
;; Map the PDP entries to PD tables
mov ebx, PD_table ; start address
mov ecx, 0x0 ; counter variable
.map_pdp_table:
mov eax, ebx
or eax, 1 << 1 | 1 << 0 ; present + writable
mov [PDP_table + 8 * ecx], eax
inc ecx
add ebx, 4096
cmp ecx, MAX_MEMORY ; PDP table is mapped if MAX_MEMORY
jne .map_pdp_table ; else map the next entry
;; Map first PDP entry to PD table
mov eax, PD_table
or eax, 0b11 ; Present + writable
mov [PDP_table], eax
;; Map each PD entry to a 'huge' 4MiB page
;; Map each PD entry to a huge 2MiB page
mov ecx, 0 ; counter variable
mov ecx, 0x0 ; counter variable
.map_pd_table:
;; map ecx-th PD entry to a huge page that starts at address 4MiB*ecx
mov eax, 0x200000
;; Map ecx-th PD entry to a huge page that starts at address 2MiB*ecx
mov eax, 0x200000 ; 2MiB
mul ecx ; start address of ecx-th page
or eax, 1 << 7 | 1 << 1 | 1 << 0 ; present + writable + huge
mov [PD_table + ecx * 8], eax
inc ecx
cmp ecx, 512 * MAX_MEMORY ; PD table is mapped if 512
or eax, 0b10000011 ; present + writable + huge
mov [PD_table + ecx * 8], eax ; map ecx-th entry
inc ecx ; increase counter
cmp ecx, 512 ; if counter == 512, the whole P2 table is mapped
jne .map_pd_table ; else map the next entry
ret
; ---------------------------------------------------------------------------- ;

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@ -63,4 +63,4 @@ PML4_table:
PDP_table:
resb 4096
PD_table:
times MAX_MEMORY resb 4096
resb 4096