diff --git a/include/io/acpi.h b/include/io/acpi.h
index be71541..56a2dde 100644
--- a/include/io/acpi.h
+++ b/include/io/acpi.h
@@ -208,7 +208,7 @@ struct SDT_MCFG_t {
   uint creatorRevision;
   ulong reserved;
   
-  ulong PCIConfigBaseAddress;
+  void* pciConfigBaseAddress;
 };
 
 //----------------------------------------------------------------------------//
diff --git a/include/io/pci.h b/include/io/pci.h
index f5d1af2..0fd4c7b 100644
--- a/include/io/pci.h
+++ b/include/io/pci.h
@@ -28,11 +28,27 @@
 #endif
 
 
+
 #ifndef _IO_PCI_H
 #define _IO_PCI_H
 
+//
+// Device registers offsets
+//
+#define PCI_REG_VENDOR      0
+#define PCI_REG_DEVICE      2
+#define PCI_REG_COMMAND     4
+#define PCI_REG_STATUS      6
+//..
+#define PCI_REG_BAR0        0x10
+#define PCI_REG_BAR1        0x14
+//..
 
-void pciGetDevice(ushort vendorID, ushort deviceID, int deviceType);
+
+//----------------------------------------------------------------------------//
+
+void IoInitPCI();
+void pciScanAll();
 
 
 #endif
diff --git a/kaleid/kernel/init/init.c b/kaleid/kernel/init/init.c
index ba93cab..877606a 100644
--- a/kaleid/kernel/init/init.c
+++ b/kaleid/kernel/init/init.c
@@ -85,6 +85,9 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg)
 
     // ACPI
     IoInitAcpi();
+    
+    // PCI
+    IoInitPCI();
 
     // Scheduler
     PsInitSched();
@@ -94,8 +97,6 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg)
     "This program comes with ABSOLUTELY NO WARRANTY.\n"
     "This is free software, type `ver' for details.\n");
     
-    pciGetDevice(0,0,0);
-    
     ShStartShell();
 
     //KeCrashSystem();
diff --git a/kaleid/kernel/io/pci.c b/kaleid/kernel/io/pci.c
index f91b160..cd591d1 100644
--- a/kaleid/kernel/io/pci.c
+++ b/kaleid/kernel/io/pci.c
@@ -25,14 +25,92 @@
 
 #include <io/pci.h>
 #include <io/acpi.h>
+#include <mm/paging.h>
+
+void* pciConfigBaseAddress = NULL;
 
 
-void pciGetDevice(ushort vendorID, ushort deviceID, int deviceType)
+static inline void* pciGetConfigAddr(uchar bus, uchar device, uchar function, ushort offset)
+{
+    if(device > 32) {
+        KernLog("pciGetConfigAddr(): bad device ID\n");
+        return 0;
+    }
+    if(function > 8) {
+        KernLog("pciGetConfigAddr(): bad function ID\n");
+        return 0;
+    }
+    if(offset > 4096) {
+        KernLog("pciGetConfigAddr(): bad register offset\n");
+        return 0;
+    }
+    ulong addr = bus*32*8*4096 + device*8*4096 + function*4096 + offset + (ulong)pciConfigBaseAddress;
+        // DEBUG
+        KernLog("bus: %u\n", bus);
+        KernLog("device: %u\n", device);
+        KernLog("function: %u\n", function);
+        KernLog("offset: %u\n", offset);
+        KernLog("ADDR: %lx\n", addr);
+        KernLog("ADDR: %p\n", (void*)addr);
+    return (void*)addr;
+}
+
+uchar pciReadConfigByte(uchar bus, uchar device, uchar function, ushort offset)
+{
+    uchar *ptr = (uchar*)(pciGetConfigAddr(bus, device, function, offset));
+    KernLog("ADDR_uchar*: %p\n", ptr);
+    uchar value = *ptr;
+    //KernLog("VALUE: %u\n\n", value);
+    
+    return *ptr;
+}
+
+ushort pciReadConfigWord(uchar bus, uchar device, uchar function, ushort offset)
+{
+    return *((ushort*)(pciGetConfigAddr(bus, device, function, offset)));
+}
+
+uint pciReadConfigDWord(uchar bus, uchar device, uchar function, ushort offset)
+{
+    return *((uint*)(pciGetConfigAddr(bus, device, function, offset)));
+}
+
+void pciScanAll()
+{
+    if(pciConfigBaseAddress == NULL) {
+        KernLog("Unable to access PCI configuration : MCFG table not reachable\n");
+        return;
+    }
+    //KernLog("%x", pciReadConfigByte(0, 0, 0, 0));
+    uchar byte = pciReadConfigByte(0, 0, 0, 0);
+    
+    /*
+    for(uchar bus = 0; bus < 256; bus++) {
+        for(uchar device = 0; device < 32; device++) {
+            for(uchar function = 0; function < 8; function++) {
+                ushort vendor = pciReadWord(bus, device, function, PCI_REG_VENDOR);
+                if(vendor == 0xffff) continue;
+                KernLog("PCI device found ! vendor: %x, device: %x\n", vendor, pciReadWord(bus, device, function, PCI_REG_DEVICE));
+            }
+        }
+    }
+    */
+}
+
+void IoInitPCI()
 {
     struct SDT_MCFG_t *MCFG_table = (struct SDT_MCFG_t*)IoGetAcpiTable(SDT_MCFG);
-    if(MCFG_table == NULL)
-    {
-        DebugLog("Unable to access PCI configuration : MCFG table not reachable\n");
+    if(MCFG_table == NULL) {
+        KernLog("Unable to access PCI configuration : MCFG table not reachable\n");
     }
-    DebugLog("PCI Config Base address = 0x%lx\n", MCFG_table->PCIConfigBaseAddress);
+    pciConfigBaseAddress = MCFG_table->pciConfigBaseAddress;
+    DebugLog("PCI Config Base address = 0x%p\n", pciConfigBaseAddress);
+    
+    // 0x ff00 0000 0000 0000
+    MmMapPage(pciConfigBaseAddress, pciConfigBaseAddress + 256*1024*1024, PRESENT | READWRITE);
+    
+    pciScanAll();
 }
+
+
+