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enhancing IDT
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ed534340ae
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74593f7f71
@ -9,6 +9,7 @@ typedef struct IdtDescriptor_t IdtDescriptor_t;
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typedef struct IdtEntry_t IdtEntry_t;
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typedef struct IdtPtr_t IdtPtr_t;
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typedef struct IRQList_t IRQList_t;
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typedef struct ISRFrame_t ISRFrame_t;
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// -------------------------------------------------------------------------- //
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@ -49,6 +50,27 @@ struct IRQList_t
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} entry[224];
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};
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struct ISRFrame_t {
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/* the register file */
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uint64_t regs[15];
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/* the error code and interrupt id */
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uint64_t id;
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uint64_t error;
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/* these are pushed automatically by the CPU */
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uint64_t rip;
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uint64_t cs;
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uint64_t rflags;
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uint64_t rsp;
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uint64_t ss;
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} __attribute__((__packed__));
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typedef struct
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{
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} __attribute__((__packed__)) cpu_state_t;
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static char *IsrExceptions[32] = {
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"Divide Error Fault",
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"Debug Exception Trap",
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@ -59,7 +81,7 @@ static char *IsrExceptions[32] = {
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"Invalid Opcode Fault",
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"Device Not Available or No Math Coprocessor Fault",
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"Double Fault Abort",
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"Coprocessor Segment Overrun Fault",
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"Coprocessor Segment Overrun Fault (Legacy)",
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"Invalid TSS Fault",
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"Segment Not Present Fault",
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"Stack Segment fault",
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@ -80,7 +102,7 @@ static char *IsrExceptions[32] = {
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"Intel Reserved",
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"Intel Reserved",
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"Intel Reserved",
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"Intel Reserved",
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"Security Exception",
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"Intel Reserved"
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};
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@ -53,26 +53,41 @@ divideByZero:
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;; ISR handler
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;;
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isrPreHandler:
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mov ax, ds
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push rax
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pushAll
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mov ax, 0x0
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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; Check if we are switching from user mode to supervisor mode
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mov rax, [rsp + 152]
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and rax, 0x3000
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jz .SEnter
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swapgs ; XXX need TSS
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.SEnter:
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; Increment mask count as we configure all interrupts to mask IF
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; automatically in the IDT
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inc qword [gs:8]
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; Call the C routine for dispatching an interrupt
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cld ; DF must be cleared by the caller
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mov rdi, rsp ; First argument points to the processor state
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mov rbp, 0 ; Terminate stack traces here
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call IdtHandler
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pop rbx
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mov ds, bx
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mov es, bx
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mov fs, bx
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mov gs, bx
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; decrement mask count
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dec qword [gs:8]
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; check if we are switching from supervisor to user mode
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mov rax, [rsp + 152]
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and rax, 0x3000
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jz .SExit
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swapgs
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.SExit:
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popAll
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add rsp, 8
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sti
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; pop the error code and interrupt id
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add rsp, 16
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iretq
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;; Divide Error Fault
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@ -25,33 +25,47 @@
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[BITS 64]
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%macro pushAll 0
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push rax
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push rcx
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push rdx
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push rbx
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push r15
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push r14
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push r13
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push r12
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push r11
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push r10
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push r9
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push r8
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push rbp
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push rsi
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push rdi
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push rsi
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push rdx
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push rcx
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push rbx
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push rax
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%endmacro
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%macro popAll 0
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pop rdi
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pop rsi
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pop rbp
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pop rbx
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pop rdx
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pop rcx
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pop rax
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pop rbx
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pop rcx
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pop rdx
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pop rsi
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pop rdi
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pop rbp
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pop r8
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pop r9
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pop r10
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pop r11
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pop r12
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pop r13
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pop r14
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pop r15
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%endmacro
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%macro IsrWithoutErrCode 1
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global isr%1
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isr%1:
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cli
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push byte 0
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pushAll
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xor rdi, rdi
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mov rdi, %1
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push 0
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push %1
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jmp isrPreHandler
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%endmacro
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@ -59,8 +73,6 @@ isr%1:
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global isr%1
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isr%1:
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cli
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pushAll
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xor rdi, rdi
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mov rdi, %1
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push %1
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jmp isrPreHandler
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%endmacro
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@ -94,14 +94,12 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg)
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IoPrintRtcTime();
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/* KernLog("There was %d ticks\n", IoGetRtcTicks()); */
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/* for (uint i = 1; i < 2 ; i++) { */
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/* while (IoGetRtcTicks() < i * 10000) { */
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/* } */
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/* IoPrintRtcTime(); */
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/* } */
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int* var = 7*GB;
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*var = 2;
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KernLog("There was %d ticks\n", IoGetRtcTicks());
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for (uint i = 1; i < 20000 ; i++) {
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while (IoGetRtcTicks() < i * 10000) {
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}
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IoPrintRtcTime();
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}
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KernLog("Goodbye after %d ticks\n", IoGetRtcTicks());
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// End this machine's suffering
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@ -65,5 +65,4 @@ KeybIsr:
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mov ds, ax
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popAll
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sti
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iretq
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@ -65,5 +65,4 @@ RtcIsr:
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mov ds, ax
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popAll
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sti
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iretq
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