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mirror of https://gitlab.os-k.eu/os-k-team/os-k.git synced 2023-08-25 14:03:10 +02:00

Clean ISR/Syscall handler

This commit is contained in:
Adrien Bourmault 2021-03-04 10:19:06 +01:00
parent fe6299097f
commit b3d83fac11
Signed by: neox
GPG Key ID: 6EB408FE0ACEC664

View File

@ -58,39 +58,17 @@ isrPreHandler:
rdmsr rdmsr
push rax push rax
; Check if we are switching from user mode to supervisor mode ; Call the C routine to dispatch interrupts
;mov rax, [rsp + 152]
;and rax, 0x3000
;jz .SEnter
;swapgs ; XXX need TSS
.SEnter:
; Increment mask count as we configure all interrupts to mask IF
; automatically in the IDT
inc qword [gs:8]
; Call the C routine for dispatching an interrupt
cld ; DF must be cleared by the caller cld ; DF must be cleared by the caller
mov rdi, rsp ; First argument points to the processor state mov rdi, rsp ; First argument points to the processor state
mov rbp, 0 ; Terminate stack traces here mov rbp, 0 ; Terminate stack traces here
call _KeHandleISR call _KeHandleISR
; decrement mask count
dec qword [gs:8]
; check if we are switching from supervisor to user mode
;mov rax, [rsp + 152]
;and rax, 0x3000
;jz .SExit
;swapgs ; XXX need TSS
.SExit:
; pop the control registers ; pop the control registers
add rsp, 48 add rsp, 48
; pop registers
popAll popAll
; pop the error code and interrupt id ; pop the error code and interrupt id
add rsp, 16 add rsp, 16
@ -119,43 +97,20 @@ syscallPreHandler:
rdmsr rdmsr
push rax push rax
.SEnter: ; Call the C routine to dispatch interrupts
; Increment mask count as we configure all interrupts to mask IF
; automatically in the IDT
inc qword [gs:8]
; Call the C routine for dispatching an interrupt
cld ; DF must be cleared by the caller cld ; DF must be cleared by the caller
mov rdi, rsp ; First argument points to the processor state
mov rbp, 0 ; Terminate stack traces here mov rbp, 0 ; Terminate stack traces here
call _KeSyscallHandler call _KeSyscallHandler
; decrement mask count
dec qword [gs:8]
.SExit:
; pop the control registers ; pop the control registers
add rsp, 48 add rsp, 48
pop rbx ; do not overwrite rax, so double pop on rbx ; pop registers
pop rbx popAll
pop rcx
pop rdx
pop rsi
pop rdi
pop rbp
pop r8
pop r9
pop r10
pop r11
pop r12
pop r13
pop r14
pop r15
; pop the error code and interrupt id ; pop the error code and interrupt id
add rsp, 16 add rsp, 16
iretq
Die2: Die2:
hlt hlt
jmp Die jmp Die