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https://gitlab.os-k.eu/os-k-team/os-k.git
synced 2023-08-25 14:03:10 +02:00
Big enhancement with memory identity mapping of 8 first gigs
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parent
fe41bc864a
commit
ca7b1b731a
6
Makefile
6
Makefile
@ -192,18 +192,18 @@ $(KOBJDIR)/kernel/sched.o: $(KERNELDIR)/kernel/proc/sched.c $(KERNELDIR)/include
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.PHONY: test
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test: all
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@qemu-system-x86_64 -m 5G -mem-prealloc -hda build/bin/disk.img -d cpu_reset,guest_errors,pcall,int -enable-kvm 2> qemu.log &
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@qemu-system-x86_64 -m 5G -mem-prealloc -hda build/bin/disk.img -d cpu_reset,guest_errors,pcall,int 2> qemu.log &
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@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 64 > loader_disasm64.asm
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@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 32 > loader_disasm32.asm
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.PHONY: test32
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test32: all
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@qemu-system-i386 -hda build/bin/disk.img -d cpu_reset,guest_errors,pcall,int -enable-kvm 2> qemu.log &
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@qemu-system-i386 -hda build/bin/disk.img -d cpu_reset,guest_errors,pcall,int 2> qemu.log &
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@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 64 > loader_disasm64.asm
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@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 32 > loader_disasm32.asm
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.PHONY: debug
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debug: all
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@qemu-system-x86_64 -m 5G -hda build/bin/disk.img -d cpu_reset,guest_errors,pcall,int -s -S -enable-kvm 2> qemu.log &
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@qemu-system-x86_64 -m 5G -hda build/bin/disk.img -d cpu_reset,guest_errors,pcall,int -s -S 2> qemu.log &
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@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 64 > loader_disasm64.asm
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@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 32 > loader_disasm32.asm
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@ -23,6 +23,8 @@
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; along with OS/K. If not, see <https://www.gnu.org/licenses/>. ;
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;=----------------------------------------------------------------------------=;
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%define MAX_MEMORY 8 ; GiB
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[BITS 32]
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[section .text]
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; ---------------------------------------------------------------------------- ;
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@ -34,22 +36,28 @@ Setup_paging:
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or eax, 1 << 1 | 1 << 0 ; present + writable
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mov [PML4_table], eax
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;; Map the first PDP entry to PD table
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;; Map the first PDP entries to PD table
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mov ecx, 0x0
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mov eax, PD_table
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.map_pdp_table:
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or eax, 1 << 1 | 1 << 0 ; present + writable
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mov [PDP_table], eax
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mov [PDP_table + ecx * 8], eax
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add eax, 8
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inc ecx
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cmp ecx, MAX_MEMORY
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jne .map_pdp_table
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;; Map each PD entry to a 'huge' 2MiB page
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mov ecx, 0x0 ; counter variable
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.map_p2_table:
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.map_pd_table:
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;; map ecx-th PD entry to a huge page that starts at address 2MiB*ecx
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mov eax, 0x200000
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mul ecx ; start address of ecx-th page
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or eax, 1 << 7 | 1 << 1 | 1 << 0 ; present + writable + huge
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mov [PD_table + ecx * 8], eax
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inc ecx
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cmp ecx, 512 ; PD table is mapped if 512
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jne .map_p2_table ; else map the next entry
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cmp ecx, 512 * MAX_MEMORY ; PD table is mapped if 512
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jne .map_pd_table ; else map the next entry
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ret
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@ -125,10 +133,12 @@ InitStack:
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sar rcx, 1 ; Shift bit 0 into CY
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jnc $ + 3
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stosb
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;; We are word aligned and if bit 1 was on fill another word
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sar rcx, 1 ; Shift bit 1 into CY
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jnc $ + 4
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stosw
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;; We are dword aligned and if bit 2 was on fill another dword
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sar rcx, 1 ; Shift bit 2 into CY
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jnc $ + 3
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@ -59,4 +59,4 @@ PML4_table:
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PDP_table:
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resb 4096
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PD_table:
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resb 4096
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resb 4096 * MAX_MEMORY
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@ -67,6 +67,7 @@ struct GdtEntry_t
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uchar highBase; // last 8 bits
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} __attribute__((packed));
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// The gdt pointer
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struct GdtPtr_t
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{
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uchar limit; // upper 16 bits
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@ -93,7 +94,13 @@ size_t MmGetAvailZoneSize(void *start);
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void *MmGetFirstAvailZone(void *start);
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//
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// Initialize the descriptor table
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// Initializes the descriptor table
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//
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void MmInitGdt(void);
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//
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// Loads the descriptor table
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//
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extern void MmLoadGdt(GdtPtr_t *GdtPtr);
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// -------------------------------------------------------------------------- //
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@ -150,10 +150,8 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, int mbMagic)
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//if(rc)KernLog("error\n");
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//KernLog((char*)buf->buf);
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uchar *addr = (uchar *)(ullong)(1024*MB - 1);
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uchar *addr = (uchar *)(ullong)(1024*5*MB - 7);
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KernLog("Test, valeur autour de %p: %hhu\n", addr, *addr);
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*addr = 1;
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KernLog("Test, valeur autour de %p: %hhu\n", addr, *addr);
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// We're out
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@ -30,21 +30,26 @@ GdtPtr_t gdtPtr;
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void MmInitGdt(void)
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{
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gdtPtr.limit = (sizeof(gdt_entry_t) * 5) - 1;
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gdtPtr.base = (uint)&gdt_entries;
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gdtPtr.limit = (sizeof(GdtEntry_t) * 5) - 1;
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gdtPtr.base = (uint)(ullong)&gdtEntries;
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/* XXX set TSS register */
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//MmLoadGdt(&gdtPtr);
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}
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static void MmSetGdtEntry(int index, uint base, uint limit, uchar access,
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uchar granularity)
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{
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gdtEntries[num].lowBase = (base & 0xFFFF);
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gdtEntries[num].middleBase = (base >> 16) & 0xFF;
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gdtEntries[num].highBase = (base >> 24) & 0xFF;
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gdtEntries[index].lowBase = (base & 0xFFFF);
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gdtEntries[index].middleBase = (base >> 16) & 0xFF;
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gdtEntries[index].highBase = (base >> 24) & 0xFF;
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gdtEntries[num].lowLimit = (limit & 0xFFFF);
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gdtEntries[num].granularity = (limit >> 16) & 0x0F;
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gdtEntries[index].lowLimit = (limit & 0xFFFF);
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gdtEntries[index].granularity = (limit >> 16) & 0x0F;
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gdtEntries[num].granularity |= gran & 0xF0;
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gdtEntries[num].access = access;
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gdtEntries[index].granularity |= granularity & 0xF0;
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gdtEntries[index].access = access;
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}
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