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mirror of https://gitlab.os-k.eu/os-k-team/os-k.git synced 2023-08-25 14:03:10 +02:00

Big enhancement with memory identity mapping of 8 first gigs

This commit is contained in:
Adrien Bourmault 2019-03-27 17:29:39 +01:00
parent fe41bc864a
commit ca7b1b731a
6 changed files with 42 additions and 22 deletions

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@ -192,18 +192,18 @@ $(KOBJDIR)/kernel/sched.o: $(KERNELDIR)/kernel/proc/sched.c $(KERNELDIR)/include
.PHONY: test .PHONY: test
test: all test: all
@qemu-system-x86_64 -m 5G -mem-prealloc -hda build/bin/disk.img -d cpu_reset,guest_errors,pcall,int -enable-kvm 2> qemu.log & @qemu-system-x86_64 -m 5G -mem-prealloc -hda build/bin/disk.img -d cpu_reset,guest_errors,pcall,int 2> qemu.log &
@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 64 > loader_disasm64.asm @ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 64 > loader_disasm64.asm
@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 32 > loader_disasm32.asm @ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 32 > loader_disasm32.asm
.PHONY: test32 .PHONY: test32
test32: all test32: all
@qemu-system-i386 -hda build/bin/disk.img -d cpu_reset,guest_errors,pcall,int -enable-kvm 2> qemu.log & @qemu-system-i386 -hda build/bin/disk.img -d cpu_reset,guest_errors,pcall,int 2> qemu.log &
@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 64 > loader_disasm64.asm @ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 64 > loader_disasm64.asm
@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 32 > loader_disasm32.asm @ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 32 > loader_disasm32.asm
.PHONY: debug .PHONY: debug
debug: all debug: all
@qemu-system-x86_64 -m 5G -hda build/bin/disk.img -d cpu_reset,guest_errors,pcall,int -s -S -enable-kvm 2> qemu.log & @qemu-system-x86_64 -m 5G -hda build/bin/disk.img -d cpu_reset,guest_errors,pcall,int -s -S 2> qemu.log &
@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 64 > loader_disasm64.asm @ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 64 > loader_disasm64.asm
@ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 32 > loader_disasm32.asm @ndisasm $(BINDIR)/kaleid -o 0x00100000 -b 32 > loader_disasm32.asm

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@ -23,6 +23,8 @@
; along with OS/K. If not, see <https://www.gnu.org/licenses/>. ; ; along with OS/K. If not, see <https://www.gnu.org/licenses/>. ;
;=----------------------------------------------------------------------------=; ;=----------------------------------------------------------------------------=;
%define MAX_MEMORY 8 ; GiB
[BITS 32] [BITS 32]
[section .text] [section .text]
; ---------------------------------------------------------------------------- ; ; ---------------------------------------------------------------------------- ;
@ -34,22 +36,28 @@ Setup_paging:
or eax, 1 << 1 | 1 << 0 ; present + writable or eax, 1 << 1 | 1 << 0 ; present + writable
mov [PML4_table], eax mov [PML4_table], eax
;; Map the first PDP entry to PD table ;; Map the first PDP entries to PD table
mov ecx, 0x0
mov eax, PD_table mov eax, PD_table
.map_pdp_table:
or eax, 1 << 1 | 1 << 0 ; present + writable or eax, 1 << 1 | 1 << 0 ; present + writable
mov [PDP_table], eax mov [PDP_table + ecx * 8], eax
add eax, 8
inc ecx
cmp ecx, MAX_MEMORY
jne .map_pdp_table
;; Map each PD entry to a 'huge' 2MiB page ;; Map each PD entry to a 'huge' 2MiB page
mov ecx, 0x0 ; counter variable mov ecx, 0x0 ; counter variable
.map_p2_table: .map_pd_table:
;; map ecx-th PD entry to a huge page that starts at address 2MiB*ecx ;; map ecx-th PD entry to a huge page that starts at address 2MiB*ecx
mov eax, 0x200000 mov eax, 0x200000
mul ecx ; start address of ecx-th page mul ecx ; start address of ecx-th page
or eax, 1 << 7 | 1 << 1 | 1 << 0 ; present + writable + huge or eax, 1 << 7 | 1 << 1 | 1 << 0 ; present + writable + huge
mov [PD_table + ecx * 8], eax mov [PD_table + ecx * 8], eax
inc ecx inc ecx
cmp ecx, 512 ; PD table is mapped if 512 cmp ecx, 512 * MAX_MEMORY ; PD table is mapped if 512
jne .map_p2_table ; else map the next entry jne .map_pd_table ; else map the next entry
ret ret
@ -125,10 +133,12 @@ InitStack:
sar rcx, 1 ; Shift bit 0 into CY sar rcx, 1 ; Shift bit 0 into CY
jnc $ + 3 jnc $ + 3
stosb stosb
;; We are word aligned and if bit 1 was on fill another word ;; We are word aligned and if bit 1 was on fill another word
sar rcx, 1 ; Shift bit 1 into CY sar rcx, 1 ; Shift bit 1 into CY
jnc $ + 4 jnc $ + 4
stosw stosw
;; We are dword aligned and if bit 2 was on fill another dword ;; We are dword aligned and if bit 2 was on fill another dword
sar rcx, 1 ; Shift bit 2 into CY sar rcx, 1 ; Shift bit 2 into CY
jnc $ + 3 jnc $ + 3

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@ -59,4 +59,4 @@ PML4_table:
PDP_table: PDP_table:
resb 4096 resb 4096
PD_table: PD_table:
resb 4096 resb 4096 * MAX_MEMORY

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@ -67,6 +67,7 @@ struct GdtEntry_t
uchar highBase; // last 8 bits uchar highBase; // last 8 bits
} __attribute__((packed)); } __attribute__((packed));
// The gdt pointer
struct GdtPtr_t struct GdtPtr_t
{ {
uchar limit; // upper 16 bits uchar limit; // upper 16 bits
@ -93,7 +94,13 @@ size_t MmGetAvailZoneSize(void *start);
void *MmGetFirstAvailZone(void *start); void *MmGetFirstAvailZone(void *start);
// //
// Initialize the descriptor table // Initializes the descriptor table
// //
void MmInitGdt(void); void MmInitGdt(void);
//
// Loads the descriptor table
//
extern void MmLoadGdt(GdtPtr_t *GdtPtr);
// -------------------------------------------------------------------------- // // -------------------------------------------------------------------------- //

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@ -150,10 +150,8 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, int mbMagic)
//if(rc)KernLog("error\n"); //if(rc)KernLog("error\n");
//KernLog((char*)buf->buf); //KernLog((char*)buf->buf);
uchar *addr = (uchar *)(ullong)(1024*MB - 1); uchar *addr = (uchar *)(ullong)(1024*5*MB - 7);
KernLog("Test, valeur autour de %p: %hhu\n", addr, *addr);
*addr = 1;
KernLog("Test, valeur autour de %p: %hhu\n", addr, *addr); KernLog("Test, valeur autour de %p: %hhu\n", addr, *addr);
// We're out // We're out

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@ -30,21 +30,26 @@ GdtPtr_t gdtPtr;
void MmInitGdt(void) void MmInitGdt(void)
{ {
gdtPtr.limit = (sizeof(gdt_entry_t) * 5) - 1; gdtPtr.limit = (sizeof(GdtEntry_t) * 5) - 1;
gdtPtr.base = (uint)&gdt_entries; gdtPtr.base = (uint)(ullong)&gdtEntries;
/* XXX set TSS register */
//MmLoadGdt(&gdtPtr);
} }
static void MmSetGdtEntry(int index, uint base, uint limit, uchar access, static void MmSetGdtEntry(int index, uint base, uint limit, uchar access,
uchar granularity) uchar granularity)
{ {
gdtEntries[num].lowBase = (base & 0xFFFF); gdtEntries[index].lowBase = (base & 0xFFFF);
gdtEntries[num].middleBase = (base >> 16) & 0xFF; gdtEntries[index].middleBase = (base >> 16) & 0xFF;
gdtEntries[num].highBase = (base >> 24) & 0xFF; gdtEntries[index].highBase = (base >> 24) & 0xFF;
gdtEntries[num].lowLimit = (limit & 0xFFFF); gdtEntries[index].lowLimit = (limit & 0xFFFF);
gdtEntries[num].granularity = (limit >> 16) & 0x0F; gdtEntries[index].granularity = (limit >> 16) & 0x0F;
gdtEntries[num].granularity |= gran & 0xF0; gdtEntries[index].granularity |= granularity & 0xF0;
gdtEntries[num].access = access; gdtEntries[index].access = access;
} }