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RTL8139 initialization
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@ -36,10 +36,21 @@
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#define RTL8139_VENDOR_ID 0x10EC
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#define RTL8139_VENDOR_ID 0x10EC
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#define RTL8139_DEVICE_ID 0x8139
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#define RTL8139_DEVICE_ID 0x8139
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// Registers
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#define RTL8139_REG_CMD 0x37
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#define RTL8139_REG_IMR 0x3C
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#define RTL8139_REG_ISR 0x3E
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#define RTL8139_REG_CONFIG1 0x52
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// Config bits
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#define RTL8139_BIT_ROK 0x1 // bit 0 of IMR or ISR
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#define RTL8139_BIT_TOK 0x4 // bit 2 of IMR or ISR
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#define RTL8139_BIT_CMD_RST 0x10 // bit 4 of CMD
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//----------------------------------------------------------------------------//
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//----------------------------------------------------------------------------//
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void initRTL8139();
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void initRTL8139();
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void rtl8139ISR(ISRFrame_t *regs);
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#endif
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#endif
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@ -25,14 +25,58 @@
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#include <drivers/rtl8139.h>
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#include <drivers/rtl8139.h>
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#include <io/pci.h>
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#include <io/pci.h>
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#include <ke/idt.h>
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ushort ioBase = 0;
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void rtl8139ISR(ISRFrame_t *regs)
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{
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ushort status = IoReadWordFromPort(ioBase + RTL8139_REG_ISR);
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if(status & RTL8139_BIT_TOK) {
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KernLog("Send packet !!!\n");
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}
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if (status & RTL8139_BIT_ROK) {
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KernLog("Receive packet !!!\n");
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}
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}
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void initRTL8139()
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void initRTL8139()
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{
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{
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pciDev_t *rtl8139_pciDev = IoPciGetDevice(RTL8139_VENDOR_ID, RTL8139_DEVICE_ID);
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PciDev_t *rtl8139_pciDev = IoPciGetDevice(RTL8139_VENDOR_ID, RTL8139_DEVICE_ID);
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if(rtl8139_pciDev != NULL)
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if(rtl8139_pciDev != NULL)
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{
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{
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DebugLog("Network card RTL8139 found ! PCI config addr = %p\n",
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DebugLog("Network card RTL8139 found ! PCI config addr = %p\n",
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rtl8139_pciDev->configAddr);
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rtl8139_pciDev->configAddr);
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// Enable PCI bus mastering
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ushort pciCommandReg = IoPciReadConfigWord(rtl8139_pciDev, PCI_REG_COMMAND);
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pciCommandReg |= 4;
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IoPciWriteConfigWord(rtl8139_pciDev, PCI_REG_COMMAND, pciCommandReg);
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// Get I/O base address
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ioBase = IoPciReadConfigDWord(rtl8139_pciDev, PCI_REG_BAR0) & (~0x3);
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// Turn the card ON
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IoWriteByteOnPort(ioBase + RTL8139_REG_CONFIG1, 0x0);
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// Software reset
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IoWriteByteOnPort(ioBase + RTL8139_REG_CMD, RTL8139_BIT_CMD_RST);
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while((IoReadByteFromPort(ioBase + RTL8139_REG_CMD) & RTL8139_BIT_CMD_RST) != 0)
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{}
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// ... Receive buffer ...
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// Set the TOK and ROK bits high of Interrupt Mask Register (IMR)
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IoWriteWordOnPort(ioBase + RTL8139_REG_IMR, RTL8139_BIT_ROK | RTL8139_BIT_TOK);
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// Interrupts
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uchar irqNum = IoPciReadConfigByte(rtl8139_pciDev, PCI_REG_INTERRUPT_LINE);
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if(!KeRegisterISR(&rtl8139ISR, irqNum)) {
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//DebugLog("RTL8139 irq num: %u\n", irqNum);
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}
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}
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}
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}
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}
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