mirror of
https://gitlab.os-k.eu/os-k-team/os-k.git
synced 2023-08-25 14:03:10 +02:00
merge BetterCpu
This commit is contained in:
commit
d88cd4d30e
@ -110,8 +110,28 @@ struct CpuInfo_t
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};
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struct ISRFrame_t {
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/* The register file */
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ulong regs[20];
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/* The registers */
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ulong efer;
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ulong cr0;
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ulong cr2;
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ulong cr3;
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ulong cr4;
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ulong cr8;
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ulong r15;
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ulong r14;
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ulong r13;
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ulong r12;
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ulong r11;
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ulong r10;
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ulong r9;
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ulong r8;
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ulong rbp;
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ulong rdi;
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ulong rsi;
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ulong rdx;
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ulong rcx;
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ulong rbx;
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ulong rax;
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/* The error code and interrupt id */
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ulong intNo;
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@ -132,7 +132,7 @@ void MmInitGdt(void);
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//
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// Loads the descriptor table
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//
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extern void MmLoadGdt(ulong ds, ulong cs, ulong tr);
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extern void MmLoadGdt();
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//
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@ -110,7 +110,7 @@ void BtInitBootInfo(multiboot_info_t *mbi, void *codeSeg)
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void BtDoSanityChecks(uint mbMagic) {
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if (!(mbMagic == MULTIBOOT_BOOTLOADER_MAGIC))
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KeStartPanic("\tMagic number %x is incorrect\n", mbMagic);
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KeStartPanic("Magic number %x is incorrect\n", mbMagic);
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DebugLog("\tKernel successfully loaded at %p\n",
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BtLoaderInfo.kernelAddr);
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@ -25,6 +25,7 @@
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#include "init.h"
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void MmInitPaging(void);
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void MmActivatePageHandler(void);
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//
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// Entry point of the Kaleid kernel
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@ -48,6 +49,7 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg)
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// Memory
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MmInitMemoryMap();
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//MmInitGdt();
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MmInitPaging();
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MmInitHeap();
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@ -60,6 +62,7 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg)
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// Start drivers
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KeEnableRTC();
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IoEnableKeyb();
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MmActivatePageHandler();
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KeStartShell();
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@ -175,7 +175,7 @@ void KeSetupIDT(void)
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// Load IDT
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KeLoadIDT();
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DebugLog("\tInterrupt table initialized\n");
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DebugLog("\tInterrupt table initialized at %p\n", _KeIdtPtr.base);
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}
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//
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@ -277,43 +277,50 @@ static void EarlyExceptionHandler(ISRFrame_t *regs)
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{
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KeStartPanic("[ISR 0x%x] Irrecoverable Kernel %s\n\n"
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" Error code : 0x%x (%b)\n\n"
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" RIP: %#016lx CS: %#016lx RSP: %#016lx\n"
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" SS: %#016lx RAX: %#016lx RBX: %#016lx\n"
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" RCX: %#016lx RDX: %#016lx RSI: %#016lx\n"
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" RDI: %#016lx RBP: %#016lx R8: %#016lx\n"
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" R9: %#016lx R10: %#016lx R11: %#016lx\n"
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" R12: %#016lx R13: %#016lx R14: %#016lx\n"
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" R15: %#016lx CR0: %#016lx CR2: %#016lx\n"
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" CR3: %#016lx CR4: %#016lx CR8: %#016lx\n"
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" RIP: %#016lx RSP: %#016lx RBP: %#016lx\n\n"
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" SS: %#016lx CS: %#016lx CR0: %#016lx\n"
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" CR2: %#016lx CR3: %#016lx CR4: %#016lx\n"
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" CR8: %#016lx EFE: %#016lx \n\n"
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" RAX: %#016lx RBX: %#016lx RCX: %#016lx\n"
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" RDX: %#016lx RSI: %#016lx RDI: %#016lx\n"
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" R8: %#016lx R9: %#016lx R10: %#016lx\n"
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" R11: %#016lx R12: %#016lx R13: %#016lx\n"
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" R14: %#016lx R15: %#016lx \n\n"
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" RFLAGS: %#022b (%#06x)",
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regs->intNo,
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ExceptionsChar[regs->intNo],
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regs->ErrorCode,
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regs->ErrorCode,
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regs->rip,
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regs->cs,
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regs->rsp,
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regs->rbp,
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regs->ss,
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regs->regs[5],
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regs->regs[6],
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regs->regs[7],
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regs->regs[8],
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regs->regs[9],
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regs->regs[10],
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regs->regs[11],
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regs->regs[12],
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regs->regs[13],
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regs->regs[14],
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regs->regs[15],
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regs->regs[16],
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regs->regs[17],
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regs->regs[18],
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regs->regs[19],
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regs->regs[0],
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regs->regs[1],
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regs->regs[2],
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regs->regs[3],
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regs->regs[4],
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regs->cs,
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regs->cr0,
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regs->cr2,
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regs->cr3,
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regs->cr4,
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regs->cr8,
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regs->efer,
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regs->rax,
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regs->rbx,
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regs->rcx,
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regs->rdx,
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regs->rsi,
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regs->rdi,
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regs->r8,
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regs->r9,
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regs->r10,
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regs->r11,
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regs->r12,
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regs->r13,
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regs->r14,
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regs->r15,
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regs->rflags,
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regs->rflags
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);
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@ -53,6 +53,9 @@ isrPreHandler:
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push rax
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mov rax, cr0
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push rax
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mov rcx, 0xC0000080
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rdmsr
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push rax
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; Check if we are switching from user mode to supervisor mode
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mov rax, [rsp + 152]
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@ -84,7 +87,7 @@ isrPreHandler:
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.SExit:
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; pop the control registers
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add rsp, 40
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add rsp, 48
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popAll
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; pop the error code and interrupt id
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@ -33,24 +33,13 @@ global MmStoreGdt
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;; Loads the GDT
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;;
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MmLoadGdt:
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;; Loading the gdt via the gdtPtr pointer
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lgdt [rel gdtPtr]
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;; Reloading the segment registers
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mov ax, si ; data segment
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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mov ss, ax
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mov cs, di ; code segment
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lgdt [gdtPtr]
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;; We must far jump because we changed the GDT
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lea rax, [rel .next]
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lea rax, [.next]
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push rax
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ret
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.next:
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;ltr dx ; the TSS
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ret
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@ -76,7 +76,7 @@ void MmInitGdt(void)
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/* SetTssEntry(2, (ulong)&tssEntry, sizeof(TssEntry_t)); */
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/* MmLoadGdt(0x8, 0x0, 2 << 3); */
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MmLoadGdt();
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}
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@ -41,7 +41,7 @@ void MmInitMemoryMap(void)
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rc = InitMemoryMap();
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if (rc)
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KeStartPanic("\tThe memory map failed to initialize.\nError : %s",
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KeStartPanic("Failed to initialize the memory map\nError : %s",
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strerror(rc) );
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}
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@ -2,8 +2,10 @@
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#include <init/boot.h>
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#include <ex/malloc.h>
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#include <mm/mm.h>
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#include <ke/idt.h>
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#define PAGESIZE (4 * KB)
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#define KPAGESIZE (4 * KB)
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#define UPAGESIZE (2 * MB)
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// Page directory pointer offset
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@ -39,18 +41,19 @@ enum
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//-----------
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volatile pdpe_t MmPML4[512] __attribute__((__aligned__(4096)));
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volatile pdpe_t MmPML4[512] __attribute__((__aligned__(KPAGESIZE)));
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volatile pde_t MmPDP[512] __attribute__((__aligned__(4096)));
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volatile pde_t MmPDP[512] __attribute__((__aligned__(KPAGESIZE)));
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volatile pde_t MmPD[512 * RAM_MAX] __attribute__((__aligned__(4096)));;
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volatile pde_t MmPD[512 * RAM_MAX] __attribute__((__aligned__(KPAGESIZE)));;
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volatile pte_t MmPT[512 * NB_4K] __attribute__((__aligned__(4096)));;
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volatile pte_t MmPT[512 * NB_4K] __attribute__((__aligned__(KPAGESIZE)));;
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volatile ulong MmStackGuards[2] = { 0 };
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//
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// Creates our new page table structure and loads it
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//
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void MmInitPaging(void)
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{
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extern MemoryMap_t memoryMap;
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@ -63,25 +66,25 @@ void MmInitPaging(void)
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for (volatile ulong i = 0; i < 512 * NB_4K; i++) {
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// STACK GUARD PAGE
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if ((ulong)(i*4096) == (ulong)BtLoaderInfo.stackEndAddr) {
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MmPT[i] = ((ulong)(i*4096));
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if ((ulong)(i*KPAGESIZE) == (ulong)BtLoaderInfo.stackEndAddr) {
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MmPT[i] = ((ulong)(i*KPAGESIZE));
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MmStackGuards[0] = i;
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continue;
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}
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// ENOMEM like
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if ((ulong)(i*4096) > (ulong)phRamSize) {
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if ((ulong)(i*KPAGESIZE) > (ulong)phRamSize) {
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break;
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}
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// STACK GARD PAGE
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if ((ulong)(i*4096) == (ulong)BtLoaderInfo.kernelEndAddr) {
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MmPT[i] = ((ulong)(i*4096));
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if ((ulong)(i*KPAGESIZE) == (ulong)BtLoaderInfo.kernelEndAddr) {
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MmPT[i] = ((ulong)(i*KPAGESIZE));
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MmStackGuards[1] = i;
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continue;
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}
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MmPT[i] = ((ulong)(i*4096)) | MF_PRESENT | MF_READWRITE;
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MmPT[i] = ((ulong)(i*KPAGESIZE)) | MF_PRESENT | MF_READWRITE;
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}
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for (volatile ulong i = 0; i < NB_4K; i++) {
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@ -90,12 +93,12 @@ void MmInitPaging(void)
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for (volatile ulong i = NB_4K; i < 512 * RAM_MAX; i++) {
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// ENOMEM like
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if ((ulong)(i* 2048 * 1024) > (ulong)phRamSize) {
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if ((ulong)(i* UPAGESIZE) > (ulong)phRamSize) {
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break;
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}
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MmPD[i] = 0;
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MmPD[i] = ((ulong)(i* 2048 * 1024)) | MF_PRESENT | MF_READWRITE | MF_HUGE;
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MmPD[i] = ((ulong)(i* UPAGESIZE)) | MF_PRESENT | MF_READWRITE | MF_HUGE;
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}
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for (volatile int i = 0; i < RAM_MAX; i++) {
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@ -105,4 +108,114 @@ void MmInitPaging(void)
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MmPML4[0] = (ulong)(&MmPDP[0])| MF_PRESENT | MF_READWRITE;
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MmLoadPML4((void *)MmPML4);
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DebugLog("\tPaging tables initialized at %p, %p\n", &MmPD, &MmPT);
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}
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//
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// Reloads the page tables
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//
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void MmReloadPaging(void)
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{
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extern MemoryMap_t memoryMap;
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ulong phRamSize = memoryMap.freeRamSize + memoryMap.nonfreeRamSize;
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for (volatile ulong i = 0; i < 512 * NB_4K; i++) {
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// STACK GUARD PAGE
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if ((ulong)(i*KPAGESIZE) == (ulong)BtLoaderInfo.stackEndAddr) {
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MmPT[i] = ((ulong)(i*KPAGESIZE));
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MmStackGuards[0] = i;
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continue;
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}
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// ENOMEM like
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if ((ulong)(i*KPAGESIZE) > (ulong)phRamSize) {
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break;
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}
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// STACK GARD PAGE
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if ((ulong)(i*KPAGESIZE) == (ulong)BtLoaderInfo.kernelEndAddr) {
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MmPT[i] = ((ulong)(i*KPAGESIZE));
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MmStackGuards[1] = i;
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continue;
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}
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MmPT[i] = ((ulong)(i*KPAGESIZE)) | MF_PRESENT | MF_READWRITE;
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}
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for (volatile ulong i = 0; i < NB_4K; i++) {
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MmPD[i] = (ulong)(&MmPT[i*512])| MF_PRESENT | MF_READWRITE;
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}
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for (volatile ulong i = NB_4K; i < 512 * RAM_MAX; i++) {
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// ENOMEM like
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if ((ulong)(i* UPAGESIZE) > (ulong)phRamSize) {
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break;
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}
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MmPD[i] = 0;
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MmPD[i] = ((ulong)(i* UPAGESIZE)) | MF_PRESENT | MF_READWRITE | MF_HUGE;
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}
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DebugLog("Paging tables reloaded at %p, %p\n", &MmPD, &MmPT);
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}
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//
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// Page fault handler
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//
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static void PagingHandler(ISRFrame_t *regs)
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{
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KeStartPanic("[ISR 0x%x] Irrecoverable Kernel Page Fault at %p\n\n"
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" Error code : 0x%x (%b)\n\n"
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" RIP: %#016lx RSP: %#016lx RBP: %#016lx\n\n"
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" SS: %#016lx CS: %#016lx CR0: %#016lx\n"
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" CR2: %#016lx CR3: %#016lx CR4: %#016lx\n"
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" CR8: %#016lx EFE: %#016lx \n\n"
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" RAX: %#016lx RBX: %#016lx RCX: %#016lx\n"
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" RDX: %#016lx RSI: %#016lx RDI: %#016lx\n"
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" R8: %#016lx R9: %#016lx R10: %#016lx\n"
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" R11: %#016lx R12: %#016lx R13: %#016lx\n"
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" R14: %#016lx R15: %#016lx \n\n"
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" RFLAGS: %#022b (%#06x)",
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regs->intNo,
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regs->cr2,
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regs->ErrorCode,
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regs->ErrorCode,
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regs->rip,
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regs->rsp,
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regs->rbp,
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regs->ss,
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regs->cs,
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regs->cr0,
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regs->cr2,
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regs->cr3,
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regs->cr4,
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regs->cr8,
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regs->efer,
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regs->rax,
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regs->rbx,
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regs->rcx,
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regs->rdx,
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regs->rsi,
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regs->rdi,
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regs->r8,
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regs->r9,
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regs->r10,
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regs->r11,
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regs->r12,
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regs->r13,
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regs->r14,
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regs->r15,
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regs->rflags,
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regs->rflags
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);
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}
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void MmActivatePageHandler(void)
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{
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KeRegisterISR(PagingHandler, 0xe);
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}
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|
@ -251,11 +251,11 @@ error_t CmdArgs(int argc, char **argv, char *cmdline)
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return EOK;
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}
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void MmInitPaging(void);
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void MmReloadPaging(void);
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error_t CmdReloadPage(int argc, char **argv, char *cmdline)
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{
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MmInitPaging();
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MmReloadPaging();
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return EOK;
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}
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