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some reorganization

This commit is contained in:
Adrien Bourmault 2019-04-24 11:40:14 +02:00
parent 6f86a1dc28
commit e739070ca5
6 changed files with 20 additions and 246 deletions
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163
include/kernel/cpu.h
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@ -1,163 +0,0 @@
//----------------------------------------------------------------------------//
// GNU GPL OS/K //
// //
// Desc: CPU related functions //
// //
// //
// Copyright © 2018-2019 The OS/K Team //
// //
// This file is part of OS/K. //
// //
// OS/K is free software: you can redistribute it and/or modify //
// it under the terms of the GNU General Public License as published by //
// the Free Software Foundation, either version 3 of the License, or //
// any later version. //
// //
// OS/K is distributed in the hope that it will be useful, //
// but WITHOUT ANY WARRANTY//without even the implied warranty of //
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the //
// GNU General Public License for more details. //
// //
// You should have received a copy of the GNU General Public License //
// along with OS/K. If not, see <https://www.gnu.org/licenses/>. //
//----------------------------------------------------------------------------//
#ifndef _KALKERN_BASE_H
#include <kernel/base.h>
#endif
#ifndef _KALKERN_CPU_H
#define _KALKERN_CPU_H
// -------------------------------------------------------------------------- //
typedef struct IdtDescriptor_t IdtDescriptor_t;
typedef struct IdtEntry_t IdtEntry_t;
typedef struct IdtPtr_t IdtPtr_t;
typedef struct Registers_t Registers_t;
typedef struct IRQList_t IRQList_t;
// -------------------------------------------------------------------------- //
#define interrupt(n) asm volatile ("int %0" : : "N" (n) : "cc", "memory") \
// CPU features masks
enum {
FEAT_ECX_SSE3 = 1 << 0,
FEAT_ECX_PCLMUL = 1 << 1,
FEAT_ECX_DTES64 = 1 << 2,
FEAT_ECX_MONITOR = 1 << 3,
FEAT_ECX_DS_CPL = 1 << 4,
FEAT_ECX_VMX = 1 << 5,
FEAT_ECX_SMX = 1 << 6,
FEAT_ECX_EST = 1 << 7,
FEAT_ECX_TM2 = 1 << 8,
FEAT_ECX_SSSE3 = 1 << 9,
FEAT_ECX_CID = 1 << 10,
FEAT_ECX_FMA = 1 << 12,
FEAT_ECX_CX16 = 1 << 13,
FEAT_ECX_ETPRD = 1 << 14,
FEAT_ECX_PDCM = 1 << 15,
FEAT_ECX_PCIDE = 1 << 17,
FEAT_ECX_DCA = 1 << 18,
FEAT_ECX_SSE4_1 = 1 << 19,
FEAT_ECX_SSE4_2 = 1 << 20,
FEAT_ECX_x2APIC = 1 << 21,
FEAT_ECX_MOVBE = 1 << 22,
FEAT_ECX_POPCNT = 1 << 23,
FEAT_ECX_AES = 1 << 25,
FEAT_ECX_XSAVE = 1 << 26,
FEAT_ECX_OSXSAVE = 1 << 27,
FEAT_ECX_AVX = 1 << 28,
FEAT_EDX_FPU = 1 << 0,
FEAT_EDX_VME = 1 << 1,
FEAT_EDX_DE = 1 << 2,
FEAT_EDX_PSE = 1 << 3,
FEAT_EDX_TSC = 1 << 4,
FEAT_EDX_MSR = 1 << 5,
FEAT_EDX_PAE = 1 << 6,
FEAT_EDX_MCE = 1 << 7,
FEAT_EDX_CX8 = 1 << 8,
FEAT_EDX_APIC = 1 << 9,
FEAT_EDX_SEP = 1 << 11,
FEAT_EDX_MTRR = 1 << 12,
FEAT_EDX_PGE = 1 << 13,
FEAT_EDX_MCA = 1 << 14,
FEAT_EDX_CMOV = 1 << 15,
FEAT_EDX_PAT = 1 << 16,
FEAT_EDX_PSE36 = 1 << 17,
FEAT_EDX_PSN = 1 << 18,
FEAT_EDX_CLF = 1 << 19,
FEAT_EDX_DTES = 1 << 21,
FEAT_EDX_ACPI = 1 << 22,
FEAT_EDX_MMX = 1 << 23,
FEAT_EDX_FXSR = 1 << 24,
FEAT_EDX_SSE = 1 << 25,
FEAT_EDX_SSE2 = 1 << 26,
FEAT_EDX_SS = 1 << 27,
FEAT_EDX_HTT = 1 << 28,
FEAT_EDX_TM1 = 1 << 29,
FEAT_EDX_IA64 = 1 << 30,
FEAT_EDX_PBE = 1 << 31
};
struct IdtDescriptor_t {
ushort limit;
ulong base;
} __attribute__((packed)) ;
struct IdtEntry_t
{
ushort baseLow;
ushort selector;
uchar reservedIst;
uchar flags;
ushort baseMid;
uint baseHigh;
uint reserved;
} __attribute__((packed));
struct IdtPtr_t
{
ushort limit;
void *base;
} __attribute__((packed));
struct IRQList_t
{
uchar n; //number of entries in the list
struct entry {
void (*isr)(void);
uchar irq;
ulong base;
ushort selector;
uchar flags;
} entry[225];
};
// -------------------------------------------------------------------------- //
struct Registers_t
{
ulong ds;
ulong rdi, rsi, rbp, rsp, rbx, rdx, rcx, rax;
ulong intNo, errCode;
ulong rip, cs, eflags, useresp, ss;
} __attribute__((packed));
// -------------------------------------------------------------------------- //
void CpuRegisterIrq(void (*isr)(void), uchar irq, uchar flags);
void CpuIdtSetup(void);
void IdtSetGate(uchar rank, ulong base, ushort selector, uchar flags);
void IdtHandler(ulong intNo);
void disablePIC(void);
void CpuEnableRtc(void);
// -------------------------------------------------------------------------- //
#endif

2
kaleid/kernel/cpu/cpuid.c
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@ -22,7 +22,7 @@
// along with OS/K. If not, see <https://www.gnu.org/licenses/>. //
//----------------------------------------------------------------------------//
#include <kernel/cpu.h>
#include <kernel/cpuid.h>
char *KeGetVendorString(void) {
return "Null";

83
kaleid/kernel/cpu/idt.c
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@ -23,80 +23,11 @@
//----------------------------------------------------------------------------//
#include <kernel/base.h>
#include <kernel/cpu.h>
#include <kernel/idt.h>
#include <kernel/boot.h>
#include <kernel/iomisc.h>
#include <extras/buf.h>
extern void CpuIdtInit();
extern void isr0();
extern void isr1();
extern void isr2();
extern void isr3();
extern void isr4();
extern void isr5();
extern void isr6();
extern void isr7();
extern void isr8();
extern void isr9();
extern void isr10();
extern void isr11();
extern void isr12();
extern void isr13();
extern void isr14();
extern void isr15();
extern void isr16();
extern void isr17();
extern void isr18();
extern void isr19();
extern void isr20();
extern void isr21();
extern void isr22();
extern void isr23();
extern void isr24();
extern void isr25();
extern void isr26();
extern void isr27();
extern void isr28();
extern void isr29();
extern void isr30();
extern void isr31();
static char *IsrExceptions[32] = {
"Divide Error Fault",
"Debug Exception Trap",
"Non-maskable Interrupt",
"Breakpoint Trap",
"Overflow Trap",
"Bound Range Exceeded Fault",
"Invalid Opcode Fault",
"Device Not Available or No Math Coprocessor Fault",
"Double Fault Abort",
"Coprocessor Segment Overrun Fault",
"Invalid TSS Fault",
"Segment Not Present Fault",
"Stack Segment fault",
"General Protection Fault",
"Page Fault",
"Intel Reserved",
"x87 FPU Floating Point or Math Fault",
"Alignment Check Fault",
"Machine Check Abort",
"SIMD Floating Point Fault",
"Virtualization Exception Fault",
"Intel Reserved",
"Intel Reserved",
"Intel Reserved",
"Intel Reserved",
"Intel Reserved",
"Intel Reserved",
"Intel Reserved",
"Intel Reserved",
"Intel Reserved",
"Intel Reserved",
"Intel Reserved"
};
IdtEntry_t idt[256] = { 0 };
IdtPtr_t idtPtr;
@ -106,7 +37,7 @@ IRQList_t irqList = { 0 };
//
// Registers an isr with his IRQ to handle driver interrupts
//
void CpuRegisterIrq(void (*isr)(void), uchar irq, uchar flags)
void IdtRegisterIrq(void (*isr)(void), uchar irq, uchar flags)
{
KalAssert(idt[0].flags==0); // IDT uninitialized
@ -119,10 +50,10 @@ void CpuRegisterIrq(void (*isr)(void), uchar irq, uchar flags)
//
// Installs the IDT in order to activate the interrupts handling
//
void CpuIdtSetup(void)
void IdtSetup(void)
{
// XXX detect the APIC with cpuid !
disablePIC();
DisablePIC();
ushort codeSeg = (ushort)(ulong)BtLoaderInfo.codeSegment;
@ -199,7 +130,7 @@ void IdtSetGate(uchar rank, ulong base, ushort selector, uchar flags)
//
// Disables the PIC to activate the APIC
//
void disablePIC(void)
static void DisablePIC(void)
{
// Set ICW1
IoWriteByteOnPort(0x20, 0x11);
@ -229,7 +160,7 @@ void disablePIC(void)
//
// Ends the current interrupt handling
//
void sendEOItoPIC(uchar isr)
static void SendEOItoPIC(uchar isr)
{
if(isr >= 8)
IoWriteByteOnPort(0xa0,0x20);
@ -253,6 +184,6 @@ void IdtHandler(ulong intNo)
KeStartPanic("[ISR 0x%x] Irrecoverable %s\n", intNo, exceptionMsg);
} else {
bprintf(BStdOut, "[ISR 0x%x] %s\n", intNo, exceptionMsg);
sendEOItoPIC(intNo);
SendEOItoPIC(intNo);
}
}

1
kaleid/kernel/cpu/rtc.c
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@ -23,7 +23,6 @@
//----------------------------------------------------------------------------//
#include <kernel/base.h>
#include <kernel/cpu.h>
#include <kernel/iomisc.h>
void CpuEnableRtc(void)

9
kaleid/kernel/init/init.c
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@ -28,7 +28,6 @@
#include <kernel/mboot.h>
#include <kernel/heap.h>
#include <kernel/mm.h>
#include <kernel/cpu.h>
// info.c
extern void BtDoSanityChecks(uint mbMagic);
@ -37,6 +36,9 @@ extern void BtInitBootInfo(multiboot_info_t *mbi, void *codeSeg);
// io/vga.c
extern error_t IoInitVGABuffer(void);
// cpu/idt.c
extern void IdtSetup(void);
// ps/proc.c test function
extern void pstest(void);
@ -75,16 +77,13 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg)
MmInitHeap();
PsInitSched();
CpuRegisterIrq(test, 13, 0x8E);
//MmPrintMemoryMap();
CpuIdtSetup();
IdtSetup();
KeEnableIRQs();
/* // Test Page Fault
long addr = -1;
DebugLog("%s", addr); */
CpuEnableRtc();
KernLog("\nGoodbye!");

8
kaleid/kernel/io/keyb.c
View File

@ -24,3 +24,11 @@
#include <kernel/cpu.h>
#include <kernel/iomisc.h>
extern void KeybIsr(void);
void KeybSetup(void)
{
CpuRegisterIrq(KeybIsr, 0x21, 0x8E);
}