//----------------------------------------------------------------------------// // GNU GPL OS/K // // // // Desc: RTL8139 network card driver // // // // // // Copyright © 2018-2020 The OS/K Team // // // // This file is part of OS/K. // // // // OS/K is free software: you can redistribute it and/or modify // // it under the terms of the GNU General Public License as published by // // the Free Software Foundation, either version 3 of the License, or // // any later version. // // // // OS/K is distributed in the hope that it will be useful, // // but WITHOUT ANY WARRANTY//without even the implied warranty of // // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // // GNU General Public License for more details. // // // // You should have received a copy of the GNU General Public License // // along with OS/K. If not, see . // //----------------------------------------------------------------------------// #include #include #include ushort ioBase = 0; void rtl8139ISR(ISRFrame_t *regs) { ushort status = IoReadWordFromPort(ioBase + RTL8139_REG_ISR); if(status & RTL8139_BIT_TOK) { KernLog("Send packet !!!\n"); } if (status & RTL8139_BIT_ROK) { KernLog("Receive packet !!!\n"); } } void initRTL8139() { PciDev_t *rtl8139_pciDev = IoPciGetDevice(RTL8139_VENDOR_ID, RTL8139_DEVICE_ID); if(rtl8139_pciDev != NULL) { DebugLog("Network card RTL8139 found ! PCI config addr = %p\n", rtl8139_pciDev->configAddr); // Enable PCI bus mastering ushort pciCommandReg = IoPciReadConfigWord(rtl8139_pciDev, PCI_REG_COMMAND); pciCommandReg |= 4; IoPciWriteConfigWord(rtl8139_pciDev, PCI_REG_COMMAND, pciCommandReg); // Get I/O base address ioBase = IoPciReadConfigDWord(rtl8139_pciDev, PCI_REG_BAR0) & (~0x3); // Turn the card ON IoWriteByteOnPort(ioBase + RTL8139_REG_CONFIG1, 0x0); // Software reset IoWriteByteOnPort(ioBase + RTL8139_REG_CMD, RTL8139_BIT_CMD_RST); while((IoReadByteFromPort(ioBase + RTL8139_REG_CMD) & RTL8139_BIT_CMD_RST) != 0) {} // ... Receive buffer ... // Set the TOK and ROK bits high of Interrupt Mask Register (IMR) IoWriteWordOnPort(ioBase + RTL8139_REG_IMR, RTL8139_BIT_ROK | RTL8139_BIT_TOK); // Interrupts uchar irqNum = IoPciReadConfigByte(rtl8139_pciDev, PCI_REG_INTERRUPT_LINE); if(!KeRegisterISR(&rtl8139ISR, irqNum)) { //DebugLog("RTL8139 irq num: %u\n", irqNum); } } }