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130 lines
5.1 KiB
C
130 lines
5.1 KiB
C
//----------------------------------------------------------------------------//
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// GNU GPL OS/K //
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// //
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// Desc: PCI driver //
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// //
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// //
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// Copyright © 2018-2020 The OS/K Team //
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// //
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// This file is part of OS/K. //
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// //
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// OS/K is free software: you can redistribute it and/or modify //
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// it under the terms of the GNU General Public License as published by //
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// the Free Software Foundation, either version 3 of the License, or //
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// any later version. //
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// //
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// OS/K is distributed in the hope that it will be useful, //
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// but WITHOUT ANY WARRANTY//without even the implied warranty of //
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the //
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// GNU General Public License for more details. //
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// //
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// You should have received a copy of the GNU General Public License //
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// along with OS/K. If not, see <https://www.gnu.org/licenses/>. //
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//----------------------------------------------------------------------------//
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#include <io/pci.h>
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#include <io/acpi.h>
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#include <mm/paging.h>
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void* pciConfigBaseAddress = NULL;
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static inline void* pciGetConfigAddr(uchar bus, uchar device,
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uchar function, ushort offset)
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{
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if(device > 32) {
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KernLog("pciGetConfigAddr(): bad device ID\n");
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return 0;
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}
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if(function > 8) {
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KernLog("pciGetConfigAddr(): bad function ID\n");
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return 0;
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}
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if(offset > 4096) {
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KernLog("pciGetConfigAddr(): bad register offset\n");
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return 0;
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}
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return (void*)(bus*32*8*4096 + device*8*4096 + function*4096 +
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offset + (ulong)pciConfigBaseAddress);
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}
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static inline uchar pciReadConfigByte(uchar bus, uchar device,
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uchar function, ushort offset)
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{
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return *((uchar*)(pciGetConfigAddr(bus, device, function, offset)));
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}
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static inline ushort pciReadConfigWord(uchar bus, uchar device,
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uchar function, ushort offset)
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{
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return *((ushort*)(pciGetConfigAddr(bus, device, function, offset)));
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}
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static inline uint pciReadConfigDWord(uchar bus, uchar device,
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uchar function, ushort offset)
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{
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return *((uint*)(pciGetConfigAddr(bus, device, function, offset)));
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}
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void IoPciEnumerate()
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{
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if(pciConfigBaseAddress == NULL) {
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KernLog("Unable to access PCI configuration : MCFG table not reachable\n");
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return;
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}
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for(ushort bus = 0; bus < 256; bus++) {
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for(uchar device = 0; device < 32; device++) {
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for(uchar function = 0; function < 8; function++) {
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ushort vendor = pciReadConfigWord((uchar)bus, device, function, PCI_REG_VENDOR);
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if(vendor == 0xffff) continue;
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DebugLog("PCI device found ! vendor: %x, device: %x\n",
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vendor,
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pciReadConfigWord((uchar)bus, device, function, PCI_REG_DEVICE)
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);
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}
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}
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}
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}
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pciDev_t *IoPciGetDevice(ushort vendorID, ushort deviceID)
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{
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if(pciConfigBaseAddress == NULL) {
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KernLog("Unable to access PCI configuration : MCFG table not reachable\n");
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return NULL;
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}
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for(ushort bus = 0; bus < 256; bus++) {
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for(uchar device = 0; device < 32; device++) {
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for(uchar function = 0; function < 8; function++) {
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if(vendorID == pciReadConfigWord((uchar)bus, device, function, PCI_REG_VENDOR)
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&& deviceID == pciReadConfigWord((uchar)bus, device, function, PCI_REG_DEVICE)) {
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pciDev_t *pciDevicePtr = (pciDev_t *)malloc(sizeof(pciDev_t));
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pciDevicePtr->vendorID = vendorID;
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pciDevicePtr->deviceID = deviceID;
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pciDevicePtr->configAddr = pciGetConfigAddr((uchar)bus, device, function, 0);
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return pciDevicePtr;
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}
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}
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}
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}
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return NULL;
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}
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void IoInitPCI()
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{
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struct MCFG_t *MCFG_table = (struct MCFG_t*)IoGetAcpiTable(SDT_MCFG);
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if(MCFG_table == NULL) {
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KernLog("Unable to access PCI configuration : MCFG table not reachable\n");
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}
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pciConfigBaseAddress = MCFG_table->pciConfigBaseAddress;
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DebugLog("PCI Config Base address = 0x%p\n", pciConfigBaseAddress);
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IoPciEnumerate();
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}
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