62 lines
1.3 KiB
C
62 lines
1.3 KiB
C
#include <kernel.h>
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#define PAGESIZE (4 * KB)
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// Page directory pointer offset
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typedef ulong pdpe_t;
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// Page directory offset
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typedef ulong pde_t;
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// Page table entry
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typedef ulong pte_t;
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// paging.asm
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void MmLoadPML4(void *);
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void MmEnableWriteProtect(void);
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void MmDisableWriteProtect(void);
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enum
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{
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MF_PRESENT = 1 << 0,
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MF_READWRITE = 1 << 1,
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MF_USERMODE = 1 << 2,
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MF_WRITETHR = 1 << 3,
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MF_CACHEDIS = 1 << 4,
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MF_ACCESSED = 1 << 5,
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MF_DIRTY = 1 << 6
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};
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#define RAM 8
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//-----------
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volatile pdpe_t PML4[512] __attribute__((__aligned__(4096)));
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// First PDPE of our pml4
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volatile pde_t PDP[512] __attribute__((__aligned__(4096)));
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// First PDP of first_pdpe
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volatile pte_t PD[512 * RAM] __attribute__((__aligned__(4096)));
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void MmInitPaging(void)
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{
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memzero((void *)&PML4[0], sizeof(PML4));
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memzero((void *)&PDP[0], sizeof(PDP));
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memzero((void *)&PD[0], sizeof(PD));
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for (int i = 0; i < 512 * RAM; i++) {
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PD[i] = ((ulong)i * 2048 * 1024) | MF_PRESENT | MF_READWRITE | 1 << 7;
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}
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for (int i = 0; i < RAM; i++) {
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PDP[i] = (ulong)(&PD[i*512])| MF_PRESENT | MF_READWRITE;
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}
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PML4[0] = (ulong)(&PDP[0])| MF_PRESENT | MF_READWRITE;
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MmLoadPML4((void *)PML4);
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}
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