Merge pull request #25 from psx-spx/patch-1
Add notes about byte/halfword writes to 32-bit devices
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@ -62,6 +62,20 @@ There are at least some special cases:<br/>
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FFFE0130h-FFFE0133h 8bit (+16bit?) read works ONLY from word-aligned address
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```
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#### I/O Write Datasize
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Performing a 8-bit or 16-bit write (`sb`/`sh`) will place the entirety of the GPR
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on the bus, regardless of the write size. Therefore, the data is **not** masked.
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This has an effect when performing a narrower write to a wider address, for example
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the DMA controller, but not others such as the CD-ROM controller.
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Emulators should therefore treat all access widths as having 32 bits of data, but
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depending on the device perform masking/splitting (see [Memory Control](memorycontrol.md)).
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The CD audio visualizer (aka Soundscope) in the SCPH-7xxx series of consoles is an
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example of where this behavior is required, as it issues halfword writes to the DMA
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controller addresses.
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#### Cache Problems
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The functionality of the Cache is still widely unknown. Not sure if DMA
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transfers are updating or invalidating cache. Cached Data within KSEG0 should
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