2019-05-15 20:06:45 +02:00
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// The OS/K Team licenses this file to you under the MIT license.
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// See the LICENSE file in the project root for more information.
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2019-05-15 19:26:40 +02:00
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2019-06-05 12:53:09 +02:00
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#include <pc/arch.h>
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2019-05-15 19:26:40 +02:00
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2019-06-07 22:23:38 +02:00
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//
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2019-06-17 20:59:30 +02:00
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// Read the "DECD" file before reading this code
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2019-06-07 22:23:38 +02:00
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//
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2019-05-16 21:42:23 +02:00
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2019-07-02 20:13:05 +02:00
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static void check_param_type(ctx_t *ctx, instr_t *in,
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uint prm, uchar fmt, int which)
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2019-05-16 21:42:23 +02:00
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{
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2019-06-07 22:23:38 +02:00
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bool ok;
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2019-05-16 21:42:23 +02:00
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2019-06-07 22:23:38 +02:00
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if (prm == P_REG)
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ok = (fmt == A_REG);
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2019-05-30 12:44:56 +02:00
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2019-06-07 22:23:38 +02:00
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else if (prm == P_IMM)
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ok = (fmt == A_IMM64);
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2019-05-30 12:44:56 +02:00
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2019-06-07 23:25:47 +02:00
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else /* if (prm == P_MEM) */
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2019-06-07 22:23:38 +02:00
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ok = ACC_FMT_IS_MEM(fmt);
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2019-05-16 21:42:23 +02:00
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2019-06-07 22:23:38 +02:00
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if (!ok)
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_except(ctx, E_ILL,
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2019-07-01 21:46:36 +02:00
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"FT%d not matching %s's expected parameter types: "
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"fmt=0x%x prm=0x%x", which, in->full, fmt, prm);
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2019-05-16 21:42:23 +02:00
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}
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2019-06-07 22:23:38 +02:00
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//
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// Verify that access to a certain register is legal
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//
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static void checkreg(ctx_t *ctx, uint reg, bool inv_is_ok)
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{
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if (reg >= NREGS)
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_except(ctx, E_ILL, "Inexistent register: %u", reg);
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if (reg == INV)
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{
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if (!inv_is_ok)
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_except(ctx, E_ILL, "INV dereference");
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else
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return;
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2019-05-15 19:26:40 +02:00
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}
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2019-07-11 18:34:21 +02:00
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if (ctx->r[reg].flags & RES)
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2019-06-12 15:30:35 +02:00
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//_except(ctx, E_ACC, "Reserved REG: %u", reg);
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2019-06-07 22:23:38 +02:00
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if (ctx->r[reg].flags & SYS)
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2019-07-11 18:34:21 +02:00
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if (R(CR0) & UF)
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2019-06-07 22:23:38 +02:00
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_except(ctx, E_SYS, "User access to SYS REG: %u", reg);
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}
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//
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// Extract operand according to fmt
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//
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void extract_param(ctx_t *ctx, acc_t *p, uchar fmt)
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{
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2019-06-12 15:30:35 +02:00
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uint mlen, mfmt;
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2019-06-07 22:23:38 +02:00
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ushort temp;
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p->type = fmt;
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2019-05-30 12:44:56 +02:00
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2019-06-07 22:23:38 +02:00
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if (fmt == A_REG)
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{
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p->reg = ctx->get(ctx);
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checkreg(ctx, p->reg, 0);
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p->val = R(p->reg);
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2019-06-12 15:30:35 +02:00
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return;
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2019-05-15 19:26:40 +02:00
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}
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2019-05-30 12:44:56 +02:00
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2019-06-07 22:23:38 +02:00
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else if (fmt == A_IMM64)
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{
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p->val = ctx->get(ctx);
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p->val |= (ulong)ctx->get(ctx) << 16;
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p->val |= (ulong)ctx->get(ctx) << 32;
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p->val |= (ulong)ctx->get(ctx) << 48;
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2019-06-12 15:30:35 +02:00
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return;
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2019-05-15 19:26:40 +02:00
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}
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2019-05-30 12:44:56 +02:00
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2019-06-07 22:23:38 +02:00
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assert(ACC_FMT_IS_MEM(fmt));
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//
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// Handle a memory access
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//
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mlen = fmt & AM_MLEN_MASK;
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mfmt = fmt & AM_MFMT_MASK;
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p->mlen = (mlen == AM_8ACC ? 1
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: (mlen == AM_16ACC ? 2
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: (mlen == AM_32ACC ? 4
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: (mlen == AM_64ACC ? 8 : 0))));
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if (p->mlen == 0)
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_except(ctx, E_ILL, "Invalid MLEN for access: %x", fmt);
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switch (mfmt)
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{
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case AM_IMM64:
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p->addr = ctx->get(ctx);
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p->addr |= (ulong)ctx->get(ctx) << 16;
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p->addr |= (ulong)ctx->get(ctx) << 32;
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p->addr |= (ulong)ctx->get(ctx) << 48;
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break;
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case AM_RR:
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case AM_RRI:
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case AM_RRII:
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temp = ctx->get(ctx);
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2019-06-12 15:30:35 +02:00
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p->reg1 = temp >> 8;
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p->reg2 = temp & 0xFF;
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checkreg(ctx, p->reg1, 1);
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checkreg(ctx, p->reg2, 1);
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2019-06-07 22:23:38 +02:00
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2019-06-12 15:30:35 +02:00
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if (mfmt == AM_RRI)
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{
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p->imm1 = 1;
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p->imm2 = ctx->get(ctx);
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}
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2019-06-07 22:23:38 +02:00
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2019-06-12 15:30:35 +02:00
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else if (mfmt == AM_RRII)
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2019-06-07 22:23:38 +02:00
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{
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2019-06-12 15:30:35 +02:00
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p->imm1 = ctx->get(ctx);
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p->imm2 = ctx->get(ctx);
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2019-06-07 22:23:38 +02:00
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}
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2019-06-12 15:30:35 +02:00
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else
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2019-06-07 22:23:38 +02:00
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{
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2019-06-12 15:30:35 +02:00
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p->imm1 = 1;
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p->imm2 = 0;
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2019-06-07 22:23:38 +02:00
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}
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2019-05-15 19:26:40 +02:00
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2019-07-02 20:57:40 +02:00
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p->addr = R(p->reg1) + R(p->reg2)
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* (long)(short)p->imm1
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2019-06-14 12:40:49 +02:00
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+ (long)(short)p->imm2;
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2019-06-07 22:23:38 +02:00
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break;
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default:
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_except(ctx, E_ILL, "Invalid MFMT for access: %x", fmt);
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}
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}
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2019-05-30 12:44:56 +02:00
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2019-06-17 20:59:30 +02:00
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void decode(ctx_t *ctx)
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2019-06-07 22:23:38 +02:00
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{
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2019-06-17 20:59:30 +02:00
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instr_t *in;
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acc_t p1 = { 0 };
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acc_t p2 = { 0 };
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2019-07-01 21:46:36 +02:00
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acc_t p3 = { 0 };
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2019-06-17 20:59:30 +02:00
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bool rep = 0;
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bool lock, nomore;
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ushort w1, w2;
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2019-07-01 21:46:36 +02:00
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uchar f1 = 0, f2 = 0, f3 = 0;
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2019-06-17 20:59:30 +02:00
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2019-07-11 18:34:21 +02:00
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rpc = R(RIP);
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2019-06-19 21:41:22 +02:00
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2019-06-17 20:59:30 +02:00
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//
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// Process the first word of the instruction
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//
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w1 = ctx->get(ctx);
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2019-06-07 22:23:38 +02:00
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2019-06-17 20:59:30 +02:00
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// Extract first word flags
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2019-06-07 22:23:38 +02:00
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2019-07-01 21:46:36 +02:00
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lock = !!(w1 & SUFF_LOCK);
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nomore = !!(w1 & SUFF_NOMORE);
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if (w1 & SUFF_COND)
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2019-07-02 20:13:05 +02:00
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ctx->cond = ctx->get(ctx);
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else
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ctx->cond = 0;
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2019-06-07 22:23:38 +02:00
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2019-07-01 21:46:36 +02:00
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w1 &= ~(SUFF_LOCK|SUFF_NOMORE|SUFF_COND);
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2019-06-17 20:59:30 +02:00
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// Find instruction
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if (w1 >= NINSTRS)
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{
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2019-06-19 13:47:10 +02:00
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_except(ctx, E_ILL, "No such INSTR: 0x%hX", w1);
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2019-05-15 19:26:40 +02:00
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}
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2019-06-17 20:59:30 +02:00
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in = &ctx->i[w1];
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2019-07-04 20:33:49 +02:00
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ctx->cur_in = in;
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2019-06-07 22:23:38 +02:00
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2019-06-19 13:47:10 +02:00
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if (!nomore)
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{
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//
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// Process second word
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//
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2019-06-13 15:32:24 +02:00
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2019-06-19 13:47:10 +02:00
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w2 = ctx->get(ctx);
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2019-06-07 22:23:38 +02:00
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2019-06-19 13:47:10 +02:00
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// REP and COND
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2019-07-01 21:46:36 +02:00
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rep = !!(w2 & SUFF_REP);
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2019-06-07 23:25:47 +02:00
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2019-07-01 21:46:36 +02:00
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// Fn
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f3 = (w2 >> F3_SHIFT) & Fx_MASK;
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f2 = (w2 >> F2_SHIFT) & Fx_MASK;
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f1 = w2 & Fx_MASK;
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2019-06-19 13:47:10 +02:00
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}
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2019-06-07 23:25:47 +02:00
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2019-06-17 20:59:30 +02:00
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//
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// Deal with operand 1
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//
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if (in->prm1 == NOPRM)
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{
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2019-07-01 21:46:36 +02:00
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if (f1 || f2 || f3)
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2019-06-07 22:23:38 +02:00
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{
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2019-07-01 21:46:36 +02:00
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_except(ctx, E_ILL,
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"FTn (%u,%u,%u) filled for 0-param INSTR '%s'",
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f1, f2, f3, in->full);
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2019-06-12 15:47:11 +02:00
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}
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2019-06-17 20:59:30 +02:00
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2019-07-02 20:13:05 +02:00
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exec_instr(ctx, in, NULL, NULL, NULL, lock, rep);
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2019-06-17 20:59:30 +02:00
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return;
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2019-06-12 15:47:11 +02:00
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}
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2019-07-01 21:46:36 +02:00
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check_param_type(ctx, in, in->prm1, f1, 1);
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2019-06-17 20:59:30 +02:00
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extract_param(ctx, &p1, f1);
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//
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// Deal with operand 2
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//
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2019-06-12 15:47:11 +02:00
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2019-06-17 20:59:30 +02:00
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if (in->prm2 == NOPRM)
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{
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2019-07-01 21:46:36 +02:00
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if (f2 || f3)
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2019-06-12 15:47:11 +02:00
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{
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2019-07-01 21:46:36 +02:00
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_except(ctx, E_ILL,
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"FT3/FT2 (%u,%u,%u) filled for 1-param INSTR '%s'",
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f1, f2, f3, in->full);
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2019-06-07 22:23:38 +02:00
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}
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2019-06-13 15:32:24 +02:00
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2019-07-02 20:13:05 +02:00
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exec_instr(ctx, in, &p1, NULL, NULL, lock, rep);
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2019-06-17 20:59:30 +02:00
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return;
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}
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2019-06-13 17:13:59 +02:00
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2019-07-01 21:46:36 +02:00
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check_param_type(ctx, in, in->prm2, f2, 2);
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2019-06-17 20:59:30 +02:00
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extract_param(ctx, &p2, f2);
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2019-06-13 17:13:59 +02:00
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2019-07-01 21:46:36 +02:00
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//
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// Deal with operand 3
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//
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if (in->prm3 == NOPRM)
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{
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if (f3)
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{
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_except(ctx, E_ILL,
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"FT3 (%u,%u,%u) filled for 2-param INSTR '%s'",
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f1, f2, f3, in->full);
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}
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2019-07-02 20:13:05 +02:00
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exec_instr(ctx, in, &p1, &p2, NULL, lock, rep);
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2019-07-01 21:46:36 +02:00
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return;
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}
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check_param_type(ctx, in, in->prm3, f3, 3);
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extract_param(ctx, &p3, f3);
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2019-06-13 15:32:24 +02:00
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2019-07-02 20:13:05 +02:00
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exec_instr(ctx, in, &p1, &p2, &p3, lock, rep);
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2019-05-15 19:26:40 +02:00
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}
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