2019-05-15 21:47:08 +02:00
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// The OS/K Team licences this file to you under the MIT license.
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2019-05-15 21:56:42 +02:00
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// See the LICENSE file in the project root for more information.
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2019-05-15 21:47:08 +02:00
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2019-05-29 16:57:22 +02:00
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#include "../arch.h"
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2019-05-15 21:47:08 +02:00
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2019-05-15 22:08:37 +02:00
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#define IMPL_START_0(name) \
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void i_##name(ctx_t *ctx, acc_t *p1, acc_t *p2) \
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{ \
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2019-05-15 21:47:08 +02:00
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#define IMPL_START_1(name) \
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void i_##name(ctx_t *ctx, acc_t *p1, acc_t *p2) \
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{ \
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ulong v1 = (p1->type == A_REG ? ctx->r[p1->val].val : p1->val); \
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2019-05-29 16:57:22 +02:00
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if (p1->mem) v1 = readmem(ctx, v1 + p1->off, p1->mlen); \
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2019-05-15 21:47:08 +02:00
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#define IMPL_START_2(name) \
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void i_##name(ctx_t *ctx, acc_t *p1, acc_t *p2) \
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{ \
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ulong v1 = (p1->type == A_REG ? ctx->r[p1->val].val : p1->val); \
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ulong v2 = (p2->type == A_REG ? ctx->r[p2->val].val : p2->val); \
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2019-05-29 16:57:22 +02:00
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if (p1->mem) v1 = readmem(ctx, v1 + p1->off, p1->mlen); \
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if (p2->mem) v2 = readmem(ctx, v2 + p2->off, p2->mlen); \
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2019-05-16 16:48:45 +02:00
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#define IMPL_START_3(name) \
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void i_##name(ctx_t *ctx, acc_t *p1, acc_t *p2) \
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{ \
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ulong v2 = (p2->type == A_REG ? ctx->r[p2->val].val : p2->val); \
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2019-05-29 16:57:22 +02:00
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if (p2->mem) v2 = readmem(ctx, v2 + p2->off, p2->mlen); \
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2019-05-16 16:48:45 +02:00
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2019-05-15 21:47:08 +02:00
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#define IMPL_OUT \
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assert(p1->type == A_REG || p1->mem); \
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if (p1->mem) { \
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ulong addr = p1->type == A_REG ? ctx->r[p1->val].val : p1->val; \
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2019-05-29 16:57:22 +02:00
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writemem(ctx, v1, addr, p1->mlen); \
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2019-05-16 16:48:45 +02:00
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} \
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else ctx->r[p1->val].val = v1; \
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2019-05-15 21:47:08 +02:00
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} \
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#define IMPL_END \
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}
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2019-05-16 16:48:45 +02:00
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#define CHK_SUPERV() \
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do { \
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2019-05-29 19:00:13 +02:00
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if ((ctx->r[CR0].val & UF) == 1) { \
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_except(ctx, E_SYS, "Supervisor-only INSTR"); \
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} \
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} while (0)
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2019-05-15 21:47:08 +02:00
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2019-05-29 16:57:22 +02:00
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#define CHK_STACK(op) \
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if (ctx->r[RSP].val % 8 > 0 || ctx->r[RBP].val % 8 > 0) { \
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_except(ctx, E_STK, "Misaligned stack REGS"); \
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} \
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if (ctx->r[RBP].val op ctx->r[RSP].val) { \
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_except(ctx, E_STK, "RSP above RBP"); \
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}
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#define PUSH(v) \
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writemem64(ctx, v, ctx->r[RSP].val); \
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ctx->r[RSP].val -= 8; \
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#define POP(v) \
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ctx->r[RSP].val += 8; \
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v = readmem64(ctx, ctx->r[RSP].val);
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#define JUMP(v) \
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ctx->r[RIP].val = v + ctx->r[CR1].val
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