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kvisc/vm/pc/decode.c

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// The OS/K Team licenses this file to you under the MIT license.
// See the LICENSE file in the project root for more information.
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#include <pc/arch.h>
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//
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// Read the "DECD" file before reading this code
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//
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static void check_param_type(ctx_t *ctx, instr_t *in, uint prm, uchar fmt)
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{
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bool ok;
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if (prm == P_REG)
ok = (fmt == A_REG);
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else if (prm == P_IMM)
ok = (fmt == A_IMM64);
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else /* if (prm == P_MEM) */
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ok = ACC_FMT_IS_MEM(fmt);
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if (!ok)
_except(ctx, E_ILL,
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"FT1 or FT2 not matching %s's expected parameter types: "
"fmt=0x%x prm=0x%x", in->full, fmt, prm);
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}
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//
// Verify that access to a certain register is legal
//
static void checkreg(ctx_t *ctx, uint reg, bool inv_is_ok)
{
if (reg >= NREGS)
_except(ctx, E_ILL, "Inexistent register: %u", reg);
if (reg == INV)
{
if (!inv_is_ok)
_except(ctx, E_ILL, "INV dereference");
else
return;
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}
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if (ctx->r[reg].flags & (RES | CTL))
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//_except(ctx, E_ACC, "Reserved REG: %u", reg);
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if (ctx->r[reg].flags & SYS)
if (cr0 & UF)
_except(ctx, E_SYS, "User access to SYS REG: %u", reg);
}
//
// Extract operand according to fmt
//
void extract_param(ctx_t *ctx, acc_t *p, uchar fmt)
{
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uint mlen, mfmt;
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ushort temp;
p->type = fmt;
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if (fmt == A_REG)
{
p->reg = ctx->get(ctx);
checkreg(ctx, p->reg, 0);
p->val = R(p->reg);
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return;
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}
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else if (fmt == A_IMM64)
{
p->val = ctx->get(ctx);
p->val |= (ulong)ctx->get(ctx) << 16;
p->val |= (ulong)ctx->get(ctx) << 32;
p->val |= (ulong)ctx->get(ctx) << 48;
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return;
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}
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assert(ACC_FMT_IS_MEM(fmt));
//
// Handle a memory access
//
mlen = fmt & AM_MLEN_MASK;
mfmt = fmt & AM_MFMT_MASK;
p->mlen = (mlen == AM_8ACC ? 1
: (mlen == AM_16ACC ? 2
: (mlen == AM_32ACC ? 4
: (mlen == AM_64ACC ? 8 : 0))));
if (p->mlen == 0)
_except(ctx, E_ILL, "Invalid MLEN for access: %x", fmt);
switch (mfmt)
{
case AM_IMM64:
p->addr = ctx->get(ctx);
p->addr |= (ulong)ctx->get(ctx) << 16;
p->addr |= (ulong)ctx->get(ctx) << 32;
p->addr |= (ulong)ctx->get(ctx) << 48;
break;
case AM_RR:
case AM_RRI:
case AM_RRII:
temp = ctx->get(ctx);
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p->reg1 = temp >> 8;
p->reg2 = temp & 0xFF;
checkreg(ctx, p->reg1, 1);
checkreg(ctx, p->reg2, 1);
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if (mfmt == AM_RRI)
{
p->imm1 = 1;
p->imm2 = ctx->get(ctx);
}
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else if (mfmt == AM_RRII)
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{
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p->imm1 = ctx->get(ctx);
p->imm2 = ctx->get(ctx);
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}
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else
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{
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p->imm1 = 1;
p->imm2 = 0;
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}
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p->addr = R(p->reg1) + R(p->reg2) * p->imm1
+ (long)(short)p->imm2;
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break;
default:
_except(ctx, E_ILL, "Invalid MFMT for access: %x", fmt);
}
}
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void decode(ctx_t *ctx)
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{
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char *illmsg;
instr_t *in;
acc_t p1 = { 0 };
acc_t p2 = { 0 };
bool rep = 0;
uint cond = 0;
bool lock, nomore;
ushort w1, w2;
uchar f1 = 0, f2 = 0;
ulong pc = rip;
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/*
sym_t *sym = find_sym_by_addr(pc);
if (sym)
trace("0x%lX: %s:\n", pc, sym->name);
*/
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//
// Process the first word of the instruction
//
w1 = ctx->get(ctx);
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// Extract first word flags
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lock = !!(w1 & PREF_LOCK);
nomore = !!(w1 & PREF_NOMORE);
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w1 &= ~(PREF_LOCK|PREF_NOMORE);
// Find instruction
if (w1 >= NINSTRS)
{
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_except(ctx, E_ILL, "No such INSTR: 0x%hX", w1);
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}
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in = &ctx->i[w1];
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if (!nomore)
{
//
// Process second word
//
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w2 = ctx->get(ctx);
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// REP and COND
rep = !!(w2 & PREF_REP);
cond = (w2 & BITS_COND) >> COND_SHIFT;
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// F1 and F2
f1 = (w2 >> F1_SHIFT) & Fx_MASK;
f2 = w2 & Fx_MASK;
}
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//
// Deal with operand 1
//
if (in->prm1 == NOPRM)
{
if (f1 || f2)
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{
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illmsg = "FT1 and/or FT2 filled for 0-param INSTR";
goto ill;
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}
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exec_instr(ctx, in, NULL, NULL, lock, rep, cond, pc);
return;
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}
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check_param_type(ctx, in, in->prm1, f1);
extract_param(ctx, &p1, f1);
//
// Deal with operand 2
//
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if (in->prm2 == NOPRM)
{
if (f2)
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{
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illmsg = "FT2 filled for 1-param INSTR";
goto ill;
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}
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exec_instr(ctx, in, &p1, NULL, lock, rep, cond, pc);
return;
}
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check_param_type(ctx, in, in->prm2, f2);
extract_param(ctx, &p2, f2);
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exec_instr(ctx, in, &p1, &p2, lock, rep, cond, pc);
return;
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ill:
_except(ctx, E_ILL, illmsg);
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}