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kvisc/regs.c

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2019-05-15 19:26:40 +02:00
// The OS/K Team licences this file to you under the MIT license.
// See the LICENCE file in the project root for more information.
#include "arch.h"
reg_t arch_r[NREGS] =
{
{ "RAX", "Accumulator 0", 0, GPR },
{ "RBX", "Accumulator 1", 0, GPR },
{ "RCX", "Accumulator 2", 0, GPR },
{ "RDX", "Accumulator 3", 0, GPR },
{ "RDI", "Accumulator 4", 0, GPR },
{ "RSI", "Accumulator 5", 0, GPR },
{ "RBP", "Stack base", 0, GPR },
{ "RSP", "Stack pointer", 0, GPR },
{ "R08", "Accumulator 8", 0, GPR },
{ "R09", "Accumulator 9", 0, GPR },
{ "R10", "Accumulator 10", 0, GPR },
{ "R11", "Accumulator 11", 0, GPR },
{ "R12", "Accumulator 12", 0, GPR },
{ "R13", "Accumulator 13", 0, GPR },
{ "R14", "Accumulator 14", 0, GPR },
{ "R15", "Accumulator 15", 0, GPR },
{ "K00", "Supervisor accumulator 0", 0, SYS },
{ "K01", "Supervisor accumulator 1", 0, SYS },
{ "K02", "Supervisor accumulator 2", 0, SYS },
{ "K03", "Supervisor accumulator 3", 0, SYS },
{ "K04", "Supervisor accumulator 4", 0, SYS },
{ "K05", "Supervisor accumulator 5", 0, SYS },
{ "K06", "Supervisor accumulator 6", 0, SYS },
{ "K07", "Supervisor accumulator 7", 0, SYS },
{ "CR0", "Control register 0", 0, CTL },
{ "CR1", "Control register 1", 0, CTL },
{ "CR2", "Control register 2", 0, CTL },
{ "CR3", "Control register 3", 0, CTL },
{ "CR4", "Control register 4", 0, CTL },
{ "CR5", "Control register 5", 0, CTL },
{ "CR6", "Control register 6", 0, CTL },
{ "CR7", "Control register 7", 0, CTL },
{ "RIP", "Instruction pointer", 0, RES },
{ "RFG", "Flags register", 0, RES },
};