2019-05-29 16:57:22 +02:00
|
|
|
// The OS/K Team licenses this file to you under the MIT license.
|
|
|
|
// See the LICENSE file in the project root for more information.
|
|
|
|
|
2019-06-14 12:46:09 +02:00
|
|
|
// Register types
|
|
|
|
enum
|
|
|
|
{
|
|
|
|
GPR = 1 << 0, // General
|
|
|
|
CTL = 1 << 1, // Control
|
|
|
|
SEG = 1 << 2, // Segment
|
|
|
|
RES = 1 << 8, // Reserved for insternal use
|
|
|
|
SYS = 1 << 9, // Reserved for supervisor mode
|
|
|
|
};
|
|
|
|
|
|
|
|
// FLG register
|
|
|
|
enum
|
|
|
|
{
|
|
|
|
CF = 1 << 0, // Carry flag
|
|
|
|
OF = 1 << 1, // Overflow flag
|
|
|
|
|
|
|
|
ZF = 1 << 2, // Zero flag
|
|
|
|
SF = 1 << 3, // Sign flag
|
|
|
|
|
|
|
|
PF = 1 << 4, // Parity flag
|
|
|
|
DF = 1 << 5, // Direction flag
|
|
|
|
};
|
|
|
|
|
|
|
|
// CR0 register
|
|
|
|
enum
|
|
|
|
{
|
2019-06-19 21:41:22 +02:00
|
|
|
IF = 1 << 0, // Interrupts-enable flag
|
|
|
|
UF = 1 << 1, // User-mode flag
|
2019-06-14 12:46:09 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
struct reg_t
|
|
|
|
{
|
|
|
|
char *name;
|
|
|
|
ulong flags;
|
|
|
|
};
|
|
|
|
|
2019-05-29 16:57:22 +02:00
|
|
|
enum
|
|
|
|
{
|
2019-07-01 00:45:08 +02:00
|
|
|
INV, FLG, RIP, RPC, PX0, PX1, FC1, FC2,
|
2019-07-09 19:51:03 +02:00
|
|
|
SA0, SA1, SA2, SA3, // SA4, SA5, SA6, SA7,
|
|
|
|
CR0, CR1, CR2, CR3, // CR4, CR5, CR6, CR7,
|
2019-07-01 00:45:08 +02:00
|
|
|
|
|
|
|
RAX, RBX, RCX, RDX, RSI, RDI, RBP, RSP,
|
|
|
|
RX8, RX9, R10, R11, R12, R13, R14, R15,
|
|
|
|
|
|
|
|
AX0, AX1, AX2, AX3, AX4, AX5, AX6, AX7,
|
|
|
|
AX8, AX9, A10, A11, A12, A13, A14, A15,
|
|
|
|
|
|
|
|
NX0, NX1, NX2, NX3, NX4, NX5, NX6, NX7,
|
|
|
|
NX8, NX9, N10, N11, N12, N13, N14, N15,
|
2019-07-09 19:51:03 +02:00
|
|
|
|
|
|
|
// DR0, DR1, DR2, DR3, DR4, DR5, DR6, DR7,
|
|
|
|
// R16, R17, R18, R19, R20, R21, R22, R23,
|
|
|
|
// R24, R25, R26, R27, R28, R29, R30, R31,
|
|
|
|
// A16, A17, A18, A19, A20, A21, A22, A23,
|
|
|
|
// A24, A25, A26, A27, A28, A29, A30, A31,
|
|
|
|
// N16, N17, N18, N19, N20, N21, N22, N23,
|
|
|
|
// N24, N25, N26, N27, N28, N29, N30, N31,
|
2019-07-01 00:45:08 +02:00
|
|
|
|
|
|
|
NREGS
|
|
|
|
};
|
|
|
|
|
2019-07-04 20:33:49 +02:00
|
|
|
#define fc0 ctx->ninstrs
|
2019-07-01 21:46:36 +02:00
|
|
|
|
2019-06-14 13:34:24 +02:00
|
|
|
#define inv R(INV)
|
2019-06-02 16:33:28 +02:00
|
|
|
#define rip R(RIP)
|
2019-06-23 21:12:25 +02:00
|
|
|
#define rpc R(RPC)
|
2019-06-02 16:33:28 +02:00
|
|
|
#define flg R(FLG)
|
2019-07-04 20:33:49 +02:00
|
|
|
#define fc1 R(FC1)
|
|
|
|
#define fc2 R(FC2)
|
2019-07-01 00:45:08 +02:00
|
|
|
#define cr0 R(CR0)
|
|
|
|
#define cr1 R(CR1)
|
|
|
|
#define cr2 R(CR2)
|
2019-05-29 16:57:22 +02:00
|
|
|
|
2019-06-02 16:33:28 +02:00
|
|
|
#define rax R(RAX)
|
|
|
|
#define rbx R(RBX)
|
|
|
|
#define rcx R(RCX)
|
|
|
|
#define rdx R(RDX)
|
|
|
|
#define rsi R(RSI)
|
2019-06-15 20:21:38 +02:00
|
|
|
#define rdi R(RDI)
|
2019-07-01 00:45:08 +02:00
|
|
|
#define rbp R(RBP)
|
|
|
|
#define rsp R(RSP)
|
2019-05-29 16:57:22 +02:00
|
|
|
|
2019-06-05 19:31:48 +02:00
|
|
|
#define ax0 R(AX0)
|
|
|
|
#define ax1 R(AX1)
|
|
|
|
#define ax2 R(AX2)
|
|
|
|
#define ax3 R(AX3)
|
2019-05-29 16:57:22 +02:00
|
|
|
|