2019-03-25 23:10:06 +01:00
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//----------------------------------------------------------------------------//
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2020-09-27 17:33:48 +02:00
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// OS on Kaleid //
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2019-04-23 17:06:03 +02:00
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// //
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// Desc: Interrupt related functions //
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// //
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// //
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2021-02-18 19:54:35 +01:00
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// Copyright © 2018-2021 The OS/K Team //
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2019-04-23 17:06:03 +02:00
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// //
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// This file is part of OS/K. //
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// //
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// OS/K is free software: you can redistribute it and/or modify //
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// it under the terms of the GNU General Public License as published by //
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// the Free Software Foundation, either version 3 of the License, or //
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// any later version. //
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// //
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// OS/K is distributed in the hope that it will be useful, //
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// but WITHOUT ANY WARRANTY//without even the implied warranty of //
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the //
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// GNU General Public License for more details. //
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// //
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// You should have received a copy of the GNU General Public License //
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// along with OS/K. If not, see <https://www.gnu.org/licenses/>. //
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2019-03-25 23:10:06 +01:00
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//----------------------------------------------------------------------------//
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2020-02-19 22:19:58 +01:00
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#include <libbuf.h>
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2019-05-13 23:22:27 +02:00
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#include <init/boot.h>
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#include <ke/idt.h>
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2019-05-19 00:07:01 +02:00
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#include <io/vga.h>
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2019-05-22 18:15:23 +02:00
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#include <io/spkr.h>
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2020-02-06 13:18:22 +01:00
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#include <ke/time.h>
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2019-04-01 23:51:48 +02:00
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2019-04-22 20:15:32 +02:00
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IdtEntry_t idt[256] = { 0 };
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2019-05-14 11:48:07 +02:00
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IdtPtr_t _KeIdtPtr;
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2019-05-19 00:38:58 +02:00
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bool KeIdtIsInitialized = 0;
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2020-02-08 00:30:09 +01:00
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ulong KeSpuriousCount = 0;
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2019-03-25 23:10:06 +01:00
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2019-05-14 11:48:07 +02:00
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static ISRList_t isrList = { 0 };
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2019-04-24 00:05:03 +02:00
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2019-05-14 11:48:07 +02:00
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static char *ExceptionsChar[32] = {
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2019-05-01 14:17:16 +02:00
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"Divide Error Fault",
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"Debug Exception Trap",
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"Non-maskable Interrupt",
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"Breakpoint Trap",
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"Overflow Trap",
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"Bound Range Exceeded Fault",
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"Invalid Opcode Fault",
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"Device Not Available or No Math Coprocessor Fault",
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"Double Fault Abort",
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"Coprocessor Segment Overrun Fault (Legacy)",
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"Invalid TSS Fault",
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"Segment Not Present Fault",
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"Stack Segment fault",
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"General Protection Fault",
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"Page Fault",
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"Intel Reserved",
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"x87 FPU Floating Point or Math Fault",
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"Alignment Check Fault",
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"Machine Check Abort",
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"SIMD Floating Point Fault",
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"Virtualization Exception Fault",
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"Intel Reserved",
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"Intel Reserved",
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"Intel Reserved",
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"Intel Reserved",
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"Intel Reserved",
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"Intel Reserved",
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"Intel Reserved",
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"Intel Reserved",
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"Intel Reserved",
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"Security Exception",
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"Intel Reserved"
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};
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static void EnablePIC(void);
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2019-05-14 11:48:07 +02:00
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static void EarlyExceptionHandler(ISRFrame_t *regs);
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2019-05-22 00:38:04 +02:00
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static void DoubleFaultHandler(ISRFrame_t *regs);
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2021-02-26 13:18:20 +01:00
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static void EarlySyscallHandler(ISRFrame_t *regs);
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2019-05-22 00:38:04 +02:00
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2019-04-24 00:05:03 +02:00
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//
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// Registers an isr with his IRQ to handle driver interrupts
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//
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2019-05-14 11:48:07 +02:00
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error_t KeRegisterISR(void (*isr)(ISRFrame_t *regs), uchar isrNo)
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2019-04-24 00:05:03 +02:00
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{
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2021-02-26 13:18:20 +01:00
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uchar n = isrList.n; // Number of registered entries
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2019-05-06 22:04:22 +02:00
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int OverWriting = 0;
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2019-04-24 18:42:38 +02:00
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2019-05-19 00:38:58 +02:00
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assert(KeIdtIsInitialized); // IDT initialized
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2019-04-24 00:05:03 +02:00
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2019-05-06 22:04:22 +02:00
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if (n == 0) goto settingUp;
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2019-04-24 18:42:38 +02:00
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2019-05-06 22:04:22 +02:00
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for (int i = 0; i < n; i++) {
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2021-02-26 13:18:20 +01:00
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if (isrNo == isrList.entry[i].isrNo) { // If that isr is already
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// registered, overwrite using
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// the same entry
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2019-05-06 22:04:22 +02:00
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n = i;
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OverWriting++;
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break;
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}
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}
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2021-02-26 13:18:20 +01:00
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if ((n == 255)) // That IRQ cannot exists
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2019-05-06 22:04:22 +02:00
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return ENOMEM;
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settingUp:
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isrList.entry[n].isr = isr;
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isrList.entry[n].isrNo = isrNo;
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if (!OverWriting) isrList.n++;
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2020-02-06 17:45:44 +01:00
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DebugLog("Interrupt %d registered to function %p\n", isrNo, isr);
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2019-05-06 22:04:22 +02:00
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return EOK;
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2019-04-24 00:05:03 +02:00
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}
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//
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// Installs the IDT in order to activate the interrupts handling
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//
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2019-05-14 11:48:07 +02:00
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void KeSetupIDT(void)
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2019-04-22 20:15:32 +02:00
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{
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2019-11-08 14:39:20 +01:00
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// XXX detect the APIC with cpuid and, perhaps, use it !
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2019-04-24 18:42:38 +02:00
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EnablePIC();
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2019-04-01 23:51:48 +02:00
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2019-04-22 20:15:32 +02:00
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ushort codeSeg = (ushort)(ulong)BtLoaderInfo.codeSegment;
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// Set IDT ptr
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2019-05-14 11:48:07 +02:00
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_KeIdtPtr.limit = (sizeof(IdtEntry_t) * 256) - 1;
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_KeIdtPtr.base = &idt;
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2019-04-22 20:15:32 +02:00
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2019-04-24 00:05:03 +02:00
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// Set IDT Exception Gates
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2020-01-05 20:13:53 +01:00
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KeSetIDTGate(0x00, (ulong)isr0, codeSeg, 0x8E, 2);
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KeSetIDTGate(0x01, (ulong)isr1, codeSeg, 0x8E, 2);
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KeSetIDTGate(0x02, (ulong)isr2, codeSeg, 0x8E, 2);
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KeSetIDTGate(0x03, (ulong)isr3, codeSeg, 0x8E, 2);
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KeSetIDTGate(0x04, (ulong)isr4, codeSeg, 0x8E, 2);
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KeSetIDTGate(0x05, (ulong)isr5, codeSeg, 0x8E, 2);
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KeSetIDTGate(0x06, (ulong)isr6, codeSeg, 0x8E, 2);
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2020-01-07 00:44:39 +01:00
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KeSetIDTGate(0x07, (ulong)isr7, codeSeg, 0x8E, 2); // XXX device not available, useful for FPU save/restore when multitasking
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KeSetIDTGate(0x08, (ulong)isr8, codeSeg, 0x8E, 1); // DOUBLE FAULT
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2020-01-05 20:13:53 +01:00
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KeSetIDTGate(0x09, (ulong)isr9, codeSeg, 0x8E, 2);
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2021-02-26 13:18:20 +01:00
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KeSetIDTGate(0x0A, (ulong)isr10, codeSeg, 0x8E, 0); // INVALID TSS, 0 means don't use Interrupt Stack Table
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2020-01-05 20:13:53 +01:00
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KeSetIDTGate(0x0B, (ulong)isr11, codeSeg, 0x8E, 2);
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2020-01-07 00:44:39 +01:00
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KeSetIDTGate(0x0C, (ulong)isr12, codeSeg, 0x8E, 1); // STACK SEGMENT FAULT
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2021-02-26 13:18:20 +01:00
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KeSetIDTGate(0x0D, (ulong)isr13, codeSeg, 0x8E, 2); // GPF
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2020-01-05 20:13:53 +01:00
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KeSetIDTGate(0x0E, (ulong)isr14, codeSeg, 0x8E, 2);
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KeSetIDTGate(0x0F, (ulong)isr15, codeSeg, 0x8E, 2); // INTEL RESERVED
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KeSetIDTGate(0x10, (ulong)isr16, codeSeg, 0x8E, 2);
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KeSetIDTGate(0x11, (ulong)isr17, codeSeg, 0x8E, 2);
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KeSetIDTGate(0x12, (ulong)isr18, codeSeg, 0x8E, 2);
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KeSetIDTGate(0x13, (ulong)isr19, codeSeg, 0x8E, 2);
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KeSetIDTGate(0x14, (ulong)isr20, codeSeg, 0x8E, 2);
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KeSetIDTGate(0x15, (ulong)isr21, codeSeg, 0x8E, 2); // INTEL RESERVED
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KeSetIDTGate(0x16, (ulong)isr22, codeSeg, 0x8E, 2); // INTEL RESERVED
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KeSetIDTGate(0x17, (ulong)isr23, codeSeg, 0x8E, 2); // INTEL RESERVED
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KeSetIDTGate(0x18, (ulong)isr24, codeSeg, 0x8E, 2); // INTEL RESERVED
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KeSetIDTGate(0x19, (ulong)isr25, codeSeg, 0x8E, 2); // INTEL RESERVED
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KeSetIDTGate(0x1A, (ulong)isr26, codeSeg, 0x8E, 2); // INTEL RESERVED
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KeSetIDTGate(0x1B, (ulong)isr27, codeSeg, 0x8E, 2); // INTEL RESERVED
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KeSetIDTGate(0x1C, (ulong)isr28, codeSeg, 0x8E, 2); // INTEL RESERVED
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KeSetIDTGate(0x1D, (ulong)isr29, codeSeg, 0x8E, 2); // INTEL RESERVED
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KeSetIDTGate(0x1E, (ulong)isr30, codeSeg, 0x8E, 2);
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KeSetIDTGate(0x1F, (ulong)isr31, codeSeg, 0x8E, 2); // INTEL RESERVED
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2019-04-22 20:15:32 +02:00
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2019-04-27 00:04:27 +02:00
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// Set IDT IRQs Gates
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2021-02-26 13:18:20 +01:00
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KeSetIDTGate(0x20, (ulong)isr32, codeSeg, 0x8E, 0); // 0 means don't use Interrupt Stack Table
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2020-01-07 00:44:39 +01:00
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KeSetIDTGate(0x21, (ulong)isr33, codeSeg, 0x8E, 3);
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2020-02-08 00:30:09 +01:00
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KeSetIDTGate(0x22, (ulong)isr34, codeSeg, 0x8E, 3); // NEVER RAISED : cascaded
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2020-01-07 00:44:39 +01:00
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KeSetIDTGate(0x23, (ulong)isr35, codeSeg, 0x8E, 3);
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KeSetIDTGate(0x24, (ulong)isr36, codeSeg, 0x8E, 3);
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KeSetIDTGate(0x25, (ulong)isr37, codeSeg, 0x8E, 3);
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KeSetIDTGate(0x26, (ulong)isr38, codeSeg, 0x8E, 3);
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KeSetIDTGate(0x27, (ulong)isr39, codeSeg, 0x8E, 3);
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KeSetIDTGate(0x28, (ulong)isr40, codeSeg, 0x8E, 3);
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KeSetIDTGate(0x29, (ulong)isr41, codeSeg, 0x8E, 3);
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KeSetIDTGate(0x2A, (ulong)isr42, codeSeg, 0x8E, 3);
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KeSetIDTGate(0x2B, (ulong)isr43, codeSeg, 0x8E, 3);
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KeSetIDTGate(0x2C, (ulong)isr44, codeSeg, 0x8E, 3);
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KeSetIDTGate(0x2D, (ulong)isr45, codeSeg, 0x8E, 3);
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KeSetIDTGate(0x2E, (ulong)isr46, codeSeg, 0x8E, 3);
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KeSetIDTGate(0x2F, (ulong)isr47, codeSeg, 0x8E, 3);
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2021-02-26 13:18:20 +01:00
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// SYSCALL
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KeSetIDTGate(0x80, (ulong)isr128, codeSeg, 0x8E, 3);
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2019-05-06 22:04:22 +02:00
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2019-05-19 00:38:58 +02:00
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KeIdtIsInitialized++;
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2019-05-06 22:04:22 +02:00
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//Setup Early Exception handler
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2021-02-26 13:18:20 +01:00
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for (uchar i = 0 ; i < 0x2F ; i++) {
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2019-05-14 11:48:07 +02:00
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KeRegisterISR(EarlyExceptionHandler, i);
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2019-05-06 22:04:22 +02:00
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}
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2019-04-24 00:05:03 +02:00
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2019-05-19 01:33:16 +02:00
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KeRegisterISR(KeBrkDumpRegisters, 0x3);
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2019-05-22 00:38:04 +02:00
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KeRegisterISR(DoubleFaultHandler, 0x8);
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2021-02-26 13:18:20 +01:00
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KeRegisterISR(EarlySyscallHandler, 0x80);
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2019-05-19 00:07:01 +02:00
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2019-04-22 20:15:32 +02:00
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// Load IDT
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2019-05-14 11:48:07 +02:00
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KeLoadIDT();
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2019-05-22 23:32:44 +02:00
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//DebugLog("\tInterrupt table initialized at %p\n", _KeIdtPtr.base);
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2020-02-06 13:18:22 +01:00
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DebugLog("Interrupts activated\n");
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2019-03-25 23:10:06 +01:00
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}
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2019-04-22 17:19:53 +02:00
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2019-04-24 00:05:03 +02:00
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//
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// Set an interrupt gate
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//
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2019-05-22 00:38:04 +02:00
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void KeSetIDTGate(uchar rank, ulong base, ushort selector, uchar flags, uchar ist)
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2019-04-22 20:15:32 +02:00
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{
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// Set Base Address
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idt[rank].baseLow = base & 0xFFFF;
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idt[rank].baseMid = (base >> 16) & 0xFFFF;
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idt[rank].baseHigh = (base >> 32) & 0xFFFFFFFF;
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// Set Selector
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idt[rank].selector = selector;
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idt[rank].flags = flags;
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// Set Reserved Areas to Zero
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2019-05-22 00:38:04 +02:00
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idt[rank].ist = ist;
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2019-04-22 20:15:32 +02:00
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idt[rank].reserved = 0;
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}
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2019-04-22 22:32:21 +02:00
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2019-04-24 00:05:03 +02:00
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//
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2019-04-24 18:42:38 +02:00
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// Enable and initializes the PIC to work correctly
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2019-04-24 00:05:03 +02:00
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//
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2019-04-24 18:42:38 +02:00
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static void EnablePIC(void)
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2019-04-24 00:05:03 +02:00
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{
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2019-04-24 18:42:38 +02:00
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// Set ICW1 - begin init of the PIC
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2019-04-22 22:32:21 +02:00
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IoWriteByteOnPort(0x20, 0x11);
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IoWriteByteOnPort(0xa0, 0x11);
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2019-05-14 11:48:07 +02:00
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2019-04-22 22:32:21 +02:00
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// Set ICW2 (IRQ base offsets)
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2020-02-08 00:30:09 +01:00
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IoWriteByteOnPort(0x21, 0x20); // 0x20 is the first free interrupt for IRQ0
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2021-02-26 13:18:20 +01:00
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IoWriteByteOnPort(0xa1, 0x28); // PIC2 is offseted to 0x28, just after PIC1
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2019-05-14 11:48:07 +02:00
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2019-04-22 22:32:21 +02:00
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// Set ICW3
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2020-02-08 00:30:09 +01:00
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IoWriteByteOnPort(0x21, 0x4); // A slave exists
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IoWriteByteOnPort(0xa1, 0x2); // You're a slave
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2019-05-14 11:48:07 +02:00
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2019-04-22 22:32:21 +02:00
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// Set ICW4
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2019-04-24 18:42:38 +02:00
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IoWriteByteOnPort(0x21, 0x1);
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IoWriteByteOnPort(0xa1, 0x1);
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2019-05-14 11:48:07 +02:00
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2019-04-22 22:32:21 +02:00
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// Set OCW1 (interrupt masks)
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IoWriteByteOnPort(0x21, 0xff);
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IoWriteByteOnPort(0xa1, 0xff);
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2019-11-14 00:54:34 +01:00
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char readIrqs = IoReadByteFromPort(0x21);
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IoWriteByteOnPort(0x21, 0xFB & readIrqs); // Enables IRQ forwarding from PIC2 to PIC 1
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2019-04-22 22:32:21 +02:00
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}
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2019-04-24 00:05:03 +02:00
|
|
|
//
|
|
|
|
// Ends the current interrupt handling
|
|
|
|
//
|
2019-05-14 11:48:07 +02:00
|
|
|
void KeSendEOItoPIC(uchar isr)
|
2019-04-24 00:05:03 +02:00
|
|
|
{
|
2019-04-24 21:08:44 +02:00
|
|
|
if(isr >= 8)
|
|
|
|
IoWriteByteOnPort(0xa0,0x20);
|
2019-04-24 00:05:03 +02:00
|
|
|
|
2019-04-24 21:08:44 +02:00
|
|
|
IoWriteByteOnPort(0x20,0x20);
|
2019-04-24 00:05:03 +02:00
|
|
|
}
|
|
|
|
|
2019-11-14 00:54:34 +01:00
|
|
|
void KeMaskIRQ(uchar isr)
|
|
|
|
{
|
|
|
|
uchar port;
|
|
|
|
uchar value;
|
|
|
|
|
2020-02-08 00:30:09 +01:00
|
|
|
if(isr < 8) {
|
2019-11-14 00:54:34 +01:00
|
|
|
port = 0x21;
|
|
|
|
} else {
|
|
|
|
port = 0xA1;
|
|
|
|
isr -= 8;
|
|
|
|
}
|
|
|
|
|
|
|
|
value = IoReadByteFromPort(port) | (1 << isr);
|
|
|
|
IoWriteByteOnPort(port, value);
|
2020-02-06 17:45:44 +01:00
|
|
|
DebugLog("ISR masked : %d\n", isr);
|
2019-11-14 00:54:34 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void KeUnmaskIRQ(uchar isr)
|
|
|
|
{
|
|
|
|
uchar port;
|
|
|
|
uchar value;
|
|
|
|
|
|
|
|
if(isr < 0x8) {
|
|
|
|
port = 0x21;
|
|
|
|
} else {
|
|
|
|
port = 0xA1;
|
|
|
|
isr -= 8;
|
|
|
|
}
|
|
|
|
|
|
|
|
value = IoReadByteFromPort(port) & ~(1 << isr);
|
|
|
|
IoWriteByteOnPort(port, value);
|
2020-02-06 17:45:44 +01:00
|
|
|
DebugLog("ISR unmasked : %d\n", isr);
|
2019-11-14 00:54:34 +01:00
|
|
|
}
|
|
|
|
|
2019-05-14 11:48:07 +02:00
|
|
|
void KeEnableNMI(void)
|
2019-04-24 23:00:12 +02:00
|
|
|
{
|
|
|
|
IoWriteByteOnPort(0x70, IoReadByteFromPort(0x70) & 0x7F);
|
2020-02-06 17:45:44 +01:00
|
|
|
DebugLog("NMI Interrupts enabled\n");
|
2019-04-24 23:00:12 +02:00
|
|
|
}
|
|
|
|
|
2019-05-14 11:48:07 +02:00
|
|
|
void KeDisableNMI(void)
|
2019-04-24 23:00:12 +02:00
|
|
|
{
|
|
|
|
IoWriteByteOnPort(0x70, IoReadByteFromPort(0x70) | 0x80);
|
2020-02-06 17:45:44 +01:00
|
|
|
DebugLog("NMI Interrupts disabled\n");
|
2019-04-24 23:00:12 +02:00
|
|
|
}
|
|
|
|
|
2020-02-08 00:30:09 +01:00
|
|
|
|
|
|
|
//
|
|
|
|
// Get the content of a register of the PIC. Parameter is a ocw3 command :
|
|
|
|
// - 0x0a : read the IRR
|
|
|
|
// - 0x0b : read the ISR
|
|
|
|
//
|
|
|
|
static inline ushort KeGetIrqRegister(int ocw3)
|
|
|
|
{
|
|
|
|
IoWriteByteOnPort(0x20, ocw3);
|
|
|
|
IoWriteByteOnPort(0xA0, ocw3);
|
|
|
|
return ((IoReadByteFromPort(0xA0) << 8) | IoReadByteFromPort(0x20)); // We MUST read the COMMAND PORT
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2019-04-24 00:05:03 +02:00
|
|
|
//
|
2019-04-27 00:04:27 +02:00
|
|
|
// The main ISR handler
|
|
|
|
//
|
2019-05-14 11:48:07 +02:00
|
|
|
void _KeHandleISR(ISRFrame_t *regs)
|
2019-04-27 00:04:27 +02:00
|
|
|
{
|
2019-05-17 21:10:22 +02:00
|
|
|
if ((regs->intNo >= 0x15) && (regs->intNo <= 0x1D))
|
2019-04-27 00:38:47 +02:00
|
|
|
return; // INTEL RESERVED
|
2019-05-14 11:48:07 +02:00
|
|
|
|
2019-05-17 21:10:22 +02:00
|
|
|
if ((regs->intNo == 0x0F) || (regs->intNo == 0x1F))
|
2019-04-27 00:38:47 +02:00
|
|
|
return; // INTEL RESERVED
|
|
|
|
|
2020-02-08 00:32:39 +01:00
|
|
|
// Spurious interrupt handling.
|
2021-02-26 13:18:20 +01:00
|
|
|
if (regs->intNo >= 0x20 && regs->intNo <= 0x2F && !(KeGetIrqRegister(0x0b) & (1<<(regs->intNo - 0x20)))) {
|
2020-02-08 00:30:09 +01:00
|
|
|
KeSpuriousCount++;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2019-05-06 22:04:22 +02:00
|
|
|
for (int i = 0; i < isrList.n; i++) {
|
|
|
|
if (regs->intNo == isrList.entry[i].isrNo) {
|
|
|
|
isrList.entry[i].isr(regs);
|
2019-04-27 00:04:27 +02:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-02-12 17:51:14 +01:00
|
|
|
bprintf(BStdDbg, "[%C%8d%C]\tISR 0x%x %s\n",
|
|
|
|
VGA_COLOR_BROWN,
|
2020-02-06 13:18:22 +01:00
|
|
|
KeGetTicks(),
|
2020-02-12 17:51:14 +01:00
|
|
|
VGA_COLOR_LIGHT_GREY,
|
2020-02-06 13:18:22 +01:00
|
|
|
regs->intNo,
|
|
|
|
"Unknown ISR Exception");
|
2019-05-14 11:48:07 +02:00
|
|
|
KeSendEOItoPIC(regs->intNo);
|
2019-04-27 00:04:27 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
//
|
2019-05-06 22:04:22 +02:00
|
|
|
// Early CPU Exception handler
|
2019-04-24 00:05:03 +02:00
|
|
|
//
|
2019-05-14 11:48:07 +02:00
|
|
|
static void EarlyExceptionHandler(ISRFrame_t *regs)
|
2019-04-22 22:32:21 +02:00
|
|
|
{
|
2019-05-19 00:38:58 +02:00
|
|
|
bprintf(BStdOut, "\n\n%CPANIC\n[ISR 0x%x] Irrecoverable Kernel %s\n\n"
|
2019-05-19 01:33:16 +02:00
|
|
|
" Error code : 0x%x (%b)",
|
2019-05-18 20:31:02 +02:00
|
|
|
|
2019-05-19 00:07:01 +02:00
|
|
|
VGA_COLOR_LIGHT_RED,
|
2019-04-27 00:04:27 +02:00
|
|
|
regs->intNo,
|
2019-05-06 22:04:22 +02:00
|
|
|
ExceptionsChar[regs->intNo],
|
2019-04-27 00:04:27 +02:00
|
|
|
regs->ErrorCode,
|
2019-05-19 01:33:16 +02:00
|
|
|
regs->ErrorCode
|
2019-05-19 00:07:01 +02:00
|
|
|
);
|
|
|
|
|
2019-05-19 01:33:16 +02:00
|
|
|
KeBrkDumpRegisters(regs);
|
|
|
|
|
2019-05-19 00:07:01 +02:00
|
|
|
BStdOut->flusher(BStdOut);
|
|
|
|
|
|
|
|
KeHaltCPU();
|
|
|
|
}
|
|
|
|
|
2019-05-22 08:35:58 +02:00
|
|
|
//
|
|
|
|
// Double Fault handling and stack overflow detection
|
|
|
|
//
|
2019-05-22 00:38:04 +02:00
|
|
|
static void DoubleFaultHandler(ISRFrame_t *regs)
|
|
|
|
{
|
2020-01-07 16:56:46 +01:00
|
|
|
bprintf(BStdOut,
|
2019-05-22 00:38:04 +02:00
|
|
|
"\n\n%CPANIC\n[ISR 0x8] Irrecoverable Kernel Double Fault Abort\n\n"
|
|
|
|
" Error code : 0x%x (%b)",
|
|
|
|
|
|
|
|
VGA_COLOR_LIGHT_RED,
|
|
|
|
regs->ErrorCode,
|
|
|
|
regs->ErrorCode
|
|
|
|
);
|
|
|
|
|
|
|
|
KeBrkDumpRegisters(regs);
|
|
|
|
|
|
|
|
BStdOut->flusher(BStdOut);
|
|
|
|
|
|
|
|
KeHaltCPU();
|
|
|
|
}
|
|
|
|
|
2021-02-26 13:18:20 +01:00
|
|
|
static void EarlySyscallHandler(ISRFrame_t *regs)
|
|
|
|
{
|
2021-02-26 17:03:39 +01:00
|
|
|
DebugLog("Got an early system call !\n");
|
2021-02-26 13:18:20 +01:00
|
|
|
}
|
|
|
|
|
2019-05-19 01:33:16 +02:00
|
|
|
void KeBrkDumpRegisters(ISRFrame_t *regs)
|
2019-05-19 00:07:01 +02:00
|
|
|
{
|
2019-05-22 18:15:23 +02:00
|
|
|
IoDoBeepNoIdt();
|
|
|
|
|
2020-02-14 16:07:46 +01:00
|
|
|
size_t N = 3;
|
|
|
|
char *ptr = (char *)lmax((ulong)BStdDbg->buf,
|
|
|
|
(ulong)(BStdDbg->wp - BStdDbg->lastLF - (BStdDbg->lineLen * N)));
|
2019-05-19 00:07:01 +02:00
|
|
|
|
2020-02-14 16:07:46 +01:00
|
|
|
bprintf(BStdOut, "\n%C Debug messages last %d lines: \n %s\n",
|
|
|
|
VGA_COLOR_LIGHT_GREY,
|
|
|
|
N,
|
|
|
|
ptr);
|
|
|
|
|
|
|
|
bprintf(BStdOut,
|
2019-05-19 00:07:01 +02:00
|
|
|
"%C RIP: %#016lx RSP: %#016lx RBP: %#016lx\n\n"
|
|
|
|
|
|
|
|
" SS: %#016lx CS: %#016lx CR0: %#016lx\n"
|
|
|
|
" CR2: %#016lx CR3: %#016lx CR4: %#016lx\n"
|
|
|
|
" CR8: %#016lx EFE: %#016lx \n\n"
|
|
|
|
|
|
|
|
" RAX: %#016lx RBX: %#016lx RCX: %#016lx\n"
|
|
|
|
" RDX: %#016lx RSI: %#016lx RDI: %#016lx\n"
|
|
|
|
|
|
|
|
" R8: %#016lx R9: %#016lx R10: %#016lx\n"
|
|
|
|
" R11: %#016lx R12: %#016lx R13: %#016lx\n"
|
|
|
|
" R14: %#016lx R15: %#016lx \n\n"
|
|
|
|
|
|
|
|
" RFLAGS: %#022b (%#06x)",
|
2019-05-19 00:38:58 +02:00
|
|
|
VGA_COLOR_LIGHT_RED,
|
2019-04-27 00:04:27 +02:00
|
|
|
regs->rip,
|
|
|
|
regs->rsp,
|
2019-05-18 20:31:02 +02:00
|
|
|
regs->rbp,
|
2019-05-07 18:09:40 +02:00
|
|
|
regs->ss,
|
2019-05-18 20:31:02 +02:00
|
|
|
regs->cs,
|
|
|
|
regs->cr0,
|
|
|
|
regs->cr2,
|
|
|
|
regs->cr3,
|
|
|
|
regs->cr4,
|
|
|
|
regs->cr8,
|
|
|
|
regs->efer,
|
|
|
|
regs->rax,
|
|
|
|
regs->rbx,
|
|
|
|
regs->rcx,
|
|
|
|
regs->rdx,
|
|
|
|
regs->rsi,
|
|
|
|
regs->rdi,
|
|
|
|
regs->r8,
|
|
|
|
regs->r9,
|
|
|
|
regs->r10,
|
|
|
|
regs->r11,
|
|
|
|
regs->r12,
|
|
|
|
regs->r13,
|
|
|
|
regs->r14,
|
|
|
|
regs->r15,
|
2019-05-08 20:54:40 +02:00
|
|
|
regs->rflags,
|
2019-05-07 18:09:40 +02:00
|
|
|
regs->rflags
|
2019-05-22 18:15:23 +02:00
|
|
|
);
|
2019-05-19 00:07:01 +02:00
|
|
|
|
|
|
|
BStdOut->flusher(BStdOut);
|
2019-04-22 22:32:21 +02:00
|
|
|
}
|