PCI base functions

This commit is contained in:
Antoine Cure 2020-02-11 23:47:02 +01:00
parent f6b1d46694
commit 65312af6dc
No known key found for this signature in database
GPG Key ID: DCA412F83BD81F24
4 changed files with 104 additions and 9 deletions

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@ -208,7 +208,7 @@ struct SDT_MCFG_t {
uint creatorRevision;
ulong reserved;
ulong PCIConfigBaseAddress;
void* pciConfigBaseAddress;
};
//----------------------------------------------------------------------------//

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@ -28,11 +28,27 @@
#endif
#ifndef _IO_PCI_H
#define _IO_PCI_H
//
// Device registers offsets
//
#define PCI_REG_VENDOR 0
#define PCI_REG_DEVICE 2
#define PCI_REG_COMMAND 4
#define PCI_REG_STATUS 6
//..
#define PCI_REG_BAR0 0x10
#define PCI_REG_BAR1 0x14
//..
void pciGetDevice(ushort vendorID, ushort deviceID, int deviceType);
//----------------------------------------------------------------------------//
void IoInitPCI();
void pciScanAll();
#endif

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@ -85,6 +85,9 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg)
// ACPI
IoInitAcpi();
// PCI
IoInitPCI();
// Scheduler
PsInitSched();
@ -94,8 +97,6 @@ noreturn void BtStartKern(multiboot_info_t *mbInfo, uint mbMagic, void *codeSeg)
"This program comes with ABSOLUTELY NO WARRANTY.\n"
"This is free software, type `ver' for details.\n");
pciGetDevice(0,0,0);
ShStartShell();
//KeCrashSystem();

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@ -25,14 +25,92 @@
#include <io/pci.h>
#include <io/acpi.h>
#include <mm/paging.h>
void* pciConfigBaseAddress = NULL;
void pciGetDevice(ushort vendorID, ushort deviceID, int deviceType)
static inline void* pciGetConfigAddr(uchar bus, uchar device, uchar function, ushort offset)
{
if(device > 32) {
KernLog("pciGetConfigAddr(): bad device ID\n");
return 0;
}
if(function > 8) {
KernLog("pciGetConfigAddr(): bad function ID\n");
return 0;
}
if(offset > 4096) {
KernLog("pciGetConfigAddr(): bad register offset\n");
return 0;
}
ulong addr = bus*32*8*4096 + device*8*4096 + function*4096 + offset + (ulong)pciConfigBaseAddress;
// DEBUG
KernLog("bus: %u\n", bus);
KernLog("device: %u\n", device);
KernLog("function: %u\n", function);
KernLog("offset: %u\n", offset);
KernLog("ADDR: %lx\n", addr);
KernLog("ADDR: %p\n", (void*)addr);
return (void*)addr;
}
uchar pciReadConfigByte(uchar bus, uchar device, uchar function, ushort offset)
{
uchar *ptr = (uchar*)(pciGetConfigAddr(bus, device, function, offset));
KernLog("ADDR_uchar*: %p\n", ptr);
uchar value = *ptr;
//KernLog("VALUE: %u\n\n", value);
return *ptr;
}
ushort pciReadConfigWord(uchar bus, uchar device, uchar function, ushort offset)
{
return *((ushort*)(pciGetConfigAddr(bus, device, function, offset)));
}
uint pciReadConfigDWord(uchar bus, uchar device, uchar function, ushort offset)
{
return *((uint*)(pciGetConfigAddr(bus, device, function, offset)));
}
void pciScanAll()
{
if(pciConfigBaseAddress == NULL) {
KernLog("Unable to access PCI configuration : MCFG table not reachable\n");
return;
}
//KernLog("%x", pciReadConfigByte(0, 0, 0, 0));
uchar byte = pciReadConfigByte(0, 0, 0, 0);
/*
for(uchar bus = 0; bus < 256; bus++) {
for(uchar device = 0; device < 32; device++) {
for(uchar function = 0; function < 8; function++) {
ushort vendor = pciReadWord(bus, device, function, PCI_REG_VENDOR);
if(vendor == 0xffff) continue;
KernLog("PCI device found ! vendor: %x, device: %x\n", vendor, pciReadWord(bus, device, function, PCI_REG_DEVICE));
}
}
}
*/
}
void IoInitPCI()
{
struct SDT_MCFG_t *MCFG_table = (struct SDT_MCFG_t*)IoGetAcpiTable(SDT_MCFG);
if(MCFG_table == NULL)
{
DebugLog("Unable to access PCI configuration : MCFG table not reachable\n");
if(MCFG_table == NULL) {
KernLog("Unable to access PCI configuration : MCFG table not reachable\n");
}
DebugLog("PCI Config Base address = 0x%lx\n", MCFG_table->PCIConfigBaseAddress);
pciConfigBaseAddress = MCFG_table->pciConfigBaseAddress;
DebugLog("PCI Config Base address = 0x%p\n", pciConfigBaseAddress);
// 0x ff00 0000 0000 0000
MmMapPage(pciConfigBaseAddress, pciConfigBaseAddress + 256*1024*1024, PRESENT | READWRITE);
pciScanAll();
}