 Adrien Bourmault
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33a614d8e2
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Legal update
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2020-09-27 17:33:48 +02:00 |
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Adrien Bourmault
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da0bf304aa
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Enumerating PCI bus according to the actual MCFG size and not maximum
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2020-02-17 19:17:52 +01:00 |
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Adrien Bourmault
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26446515b3
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Mapping only MCFG according to its actual size and not maximum
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2020-02-17 18:59:04 +01:00 |
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Adrien Bourmault
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a48e9a771d
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Mapping only MCFG according to its actual size and not maximum
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2020-02-17 18:58:56 +01:00 |
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Adrien Bourmault
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bf6e226f0a
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Mapping only MCFG according to it size and not maximum
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2020-02-17 18:58:45 +01:00 |
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Adrien Bourmault
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41560b133d
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Added class and subclass for PCI enumerating
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2020-02-17 18:47:23 +01:00 |
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Adrien Bourmault
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783dc0e697
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Bug correction : map before enumerate
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2020-02-15 11:11:49 +01:00 |
Antoine Cure
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3bbfa136eb
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Little correction about KPAGESIZE
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2020-02-13 15:32:20 +01:00 |
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Adrien Bourmault
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6ef5f0ef35
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Cleanup things
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2020-02-13 13:40:07 +01:00 |
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Adrien Bourmault
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a4287f02e5
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Some cosmetics, add panic when necessary
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2020-02-13 13:06:18 +01:00 |
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Antoine Cure
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a77637cde0
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Some functions and read-write access for config space
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2020-02-12 23:55:54 +01:00 |
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Antoine Cure
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06a80dc073
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Added: pci device struct and useful function for drivers
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2020-02-12 18:28:32 +01:00 |
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Antoine Cure
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362e90d380
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PCI cleanup
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2020-02-12 17:48:05 +01:00 |
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Antoine Cure
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9930a45163
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Fixed PCI config base address error
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2020-02-12 13:15:10 +01:00 |
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Antoine Cure
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65312af6dc
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PCI base functions
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2020-02-11 23:47:02 +01:00 |
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Adrien Bourmault
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c214943340
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misc cleanup
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2020-02-11 16:25:54 +01:00 |
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Antoine Cure
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8b8d17d93d
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WIP: get PCI config base address from MCFG table (3)
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2020-02-10 09:18:25 +01:00 |
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Antoine Cure
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ee3ad3b3fa
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WIP: get PCI config base address from MCFG table
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2020-02-10 02:26:55 +01:00 |
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Antoine Cure
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44781b1eaa
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Signature test
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2020-02-10 01:24:53 +01:00 |
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Antoine Cure
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5d892df34e
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check MCFG
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2020-02-10 01:24:53 +01:00 |